The traditional path toward integration – more and more functions on a single, monolithic chip – often occurs in bursts. Smaller semiconductor process geometries become viable, production-worthy and yield sufficient performance for base station applications. The accompanying drop in power consumption is often a full order of magnitude and this allows many previously separated functions to be integrated. This allows many new functions to be integrated and a number of highly integrated products become available in a short amount of time. In handsets this has occurred with the baseband and transceiver ICs. Following a major process geometry migration step, there is often a long lag until the next step. Alternate paths toward integration appear when the traditional path is thwarted.
Just as in handsets, where monolithic integration continued up until the RF front-end and then modules provided the continued integration, a new type of module provides a new level of integration for base station applications. Recent examples are the LTM9004 and LTM9005 μModule® receivers from Linear Technology, which integrate the high-speed ADCs with the RF signal chain. The LTM9004 implements a direct conversion architecture with an I/Q demodulator, lowpass filtering and a dual ADC (Figure 1). The LTM9005 implements an IF-sampling architecture with a downconverting mixer, SAW filter and a single ADC (Figure 2). Both are offered in a 22mm x 15mm LGA package, representing a board space reduction of about 75% while integrating multiple ICs and dozens of passive components. Such integration is not possible with the traditional path since the high-speed ADC utilizes a fine-line CMOS process while the RF components utilize silicon germanium (SiGe). Additionally, many of the passive components are completely impractical for silicon integration due to the performance requirements.
Figure 1, Direct Conversion Architecture Implemented in the LTM9004 μModule Receiver (Click image to download larger figure)
Figure 2, IF-Sampling Architecture Implemented in the LTM9005 μModule Receiver (Click image to download larger figure)
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.