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Radar Basics Part 3: Beamforming and radar digital processing

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drsmith_s400
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re: Radar Basics Part 3: Beamforming and radar digital processing
drsmith_s400   3/26/2013 3:34:10 PM
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A wonderful resource for us older engineers who never took a formal DSP course is The Scientist and Engineer's Guide to Digital Signal Processing (2nd Ed), by Steven W. Smith. Free downloads at: www.dspguide.com/swsmith.htm

Michael Parker
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re: Radar Basics Part 3: Beamforming and radar digital processing
Michael Parker   6/26/2011 5:13:29 PM
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Agreed that power consumption is an important constraint in manny applications. For the Stratix IV floating point benchmark, the configuration shown is about 14W, or 1 W per floating point FFT core. Stratix V is even less. Altera also offers mid-range FPGAs, in the Arria II and Arria V families, which offer substantially lower power at somewhat reduced performance levels. The benchmarks show were built using the Altera FFT Megacore, with the floating point option enabled. This means it is very easy for a user to create their own design and use the Early Power Estimater to determine power consumption for a specific device, configuration and Fmax. Hope this helps.

DrFPGA
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re: Radar Basics Part 3: Beamforming and radar digital processing
DrFPGA   6/17/2011 4:19:18 PM
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Great series and just the right level of detail! Are there some good power consumption metrics that could go along with the performance and LE metrics? For me, Power vs Cost vs Performance is always important in these applications.

Max The Magnificent
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re: Radar Basics Part 3: Beamforming and radar digital processing
Max The Magnificent   6/10/2011 9:45:33 PM
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I really wish I'd paid more attention to DFT and FFT stuff back when I was a student...

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