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Debug a microcontroller-to-FPGA interface from the FPGA side

6/27/2011 11:16 AM EDT
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DrFPGA
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re: Debug a microcontroller-to-FPGA interface from the FPGA side
DrFPGA   6/27/2011 11:55:00 PM
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The use of extensive filter and trigger logic is a good trade-off against FIFO depth. My design us lots of memory so usually little is left over for debugging. This approach will help.

Bibo.Yang
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re: Debug a microcontroller-to-FPGA interface from the FPGA side
Bibo.Yang   3/28/2012 6:11:46 AM
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The source code is maintained on OpenCores as bustap-jtag.

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