DDD3 memory interface speeds have been going up steadily and are now approaching 2000 Mbps data rates. DDR4 is also nearly round the corner . At these high data rates, it is becoming increasingly difficult to get good probing solutions which allow performing Signal Integrity characterization. High speed characterization is considered important for silicon based product development cycle. It is needed to understand the limitations of the current generation of DDR interface designs and to gear up our designs for next generations of DDR.
What are our options?
Logic analyzers (LA) and oscilloscopes are the two main signal analysis lab solutions available today. LA is primarily a digital data capturing device. Digital data, once captured, can be post-processed to extract meaningful information and to peform data visualization. LA based measurement has its advantage that it can capture the entire DDR bus for analysis. Captured bus data can then be visualized in various forms of abstraction ranging from waveform level, byte/word level to transaction and protocol level. LAs come with few analog outputs as well, through which analog waveform from any of the LA pins can be observed.
In theory, if you connect entire DDR bus to LA pins, then you can observe the analog waveform from any pin. However, in practice these outputs get limited by the fidelity of the signal capturing pods and cables. From signal integrity perspective these outputs are good for only a limited set of measurements like signal swing, etc.
Broadly, an LA has two ways to make contact with the DDR bus; one is to place LA probing pads in the middle of the DDR bus and second is to keep the probing pads at the end of the bus. At mid-bus, reflected wave superimposes almost in the middle of incident wave, creating distorted waveforms, leading to measurement difficulties when trying to set trigger.
End bus probing is, therefore, considered a better solution. LA probing footprints can either be placed on the main DUT board or be placed on the memory DIMM card. DIMM card placement is better as it allows us to probe the signals as seen by the memory devices on the DIMM. Special purpose DIMMs can be procured for this purpose from third party vendors [1,2] .
The most direct way to do signal integrity measurement using Oscilloscope is to use Active probes. Active probes are high-bandwidth probes which buffer the signal near to the probing point. These probes contain active electronics on the probe tip and therefore, have low loading characteristics. The probe tip needs to be either soldered down to the probing point using accessories or held manually.
Small feature size on the DIMM makes it difficult to hold down probes manually. Active probing, thus, becomes a slow and time consuming process. It takes many hours of lab work to probe even few DDR signals. Manual soldering and de-soldering also tends to damage the signal pads on the board. A typical probe will have a detachable tip that needs to be soldered down on the board (see figure 1).
Fig 1: Manual probing example - soldering tips with damping resistors for active probing. Probes attached to series resistor, which are the only
accessible points on the DIMM.
The probe can be attached to this tip easily. The number of Probe tips that can be soldered cannot be large as the space around the DIMM is limited. Also, active probes suffer from other factors such as higher noise floor, non-linear frequency response 
etc. Figure 2 shows the effects of probing tip on signal measurement : the rising edge of the signal is non-monotonic and has kinks. It will lead to difficulty in setting the trigger on the signal waveform and thus in taking setup/ hold measurements. The problem can partially be solved by employing damping resistors at the probe tip.
Fig 2: Non-monotonic edges or kinks observed in the wave form when using active probes with lead wires. Oscilloscope trigger based measurements cannot be performed.
The other method, which in our experience is better than the previous one, is to use co-axial connectors for probing. It allows oscilloscope probes to be connected easily using standard coaxial cables. These co-axial connectors need to be small in size and can be placed on the memory DIMM itself. Since oscilloscope probe channels have 50Ω impedance, connecting 50 Ω cables directly to these connectors is a problem in terms of signal loading. To get around this problem, a structure as shown in figure 3 can be used
Fig 3: Co-axial cable based signal probing with reduced loading.
The figure shows a probing technique in which the probe input impedance gets modified from 50Ω to 500Ω. During a DDR write transaction the memory is terminated by its on die termination (ODT) resistor. Since these resistors are comparable in value to 50Ω, a 500Ω probe input impedance will lead to low signal loading. Note that the signal entering the Oscilloscope has been attenuated by a factor of 10 because of the arrangement shown in Figure 3. Therefore It is recommended to set a vertical gain of 1:10 in the oscilloscope channel settings. However, the exact value for vertical gain needs to be calculated as per the memory ODT settings. This calculation is explained later.
In order to perform DDR3 signal Integrity measurements, we rejected the LA based approach, because it limits signal bandwidth and increases loading on the Address and Control signals. In our previous design experience with DDR2, probe loading was an issue, in which basic DDR transactions started failing because of probe loading. Oscilloscope based active probing method was also rejected because of limited signal fidelity it offers. Also it is quite time consuming task to take measurements on the full bus using this method. So, finally the coaxial cable method was chosen for all our DDR3 signal integrity measurements. This article describes the test setup and the results obtained on a CMOS 45nm memory controller using coaxial cable method.