Over the last decade, electronic products have become increasingly complex and dense as they support more functions into dramatically reduced footprints. The need for flexible circuits has grown exponentially, since they are often the preferred solution to achieve package weight-reduction, compared to rigid planar boards.
They are also easier to manufacture, reducing total assembly time while driving down cost and errors. Through their proven suitability for handling more than 25 point to point wires connections, flexible PCBs also provide greater system reliability.
Additionally, their main advantage is their ability to bend in order to accommodate the most cramped environments, enabling denser component layouts within the specified mechanical constraints of consumer products.
This makes flexible PCBs suitable for use in almost all electronics-based equipment, from consumer products such as digital cameras, computers and hard drives, to internal medical devices and military equipment.
Several generations of notebooks, tablet computers and other devices have been able to slim down while increasing their functionalities thanks to flexible layouts and interconnects.
Reducing the design cycle
Looking at how some flexible PCBs are designed today, and considering their development cycles, it is clear that there is considerable room for improvement. When Dassault Systèmes started to work on this subject with a leading Japanese worldwide consumer electronics company, we soon realized that their design process was slow, extremely complex and time consuming.
The first steps of the development process were purely manual and involved placing the flexible PCB assembly within the product. Even today, some companies are still making paper PCBs by hand, and check the components’ positions manually throughout the product’s physical mock up stages.
Following this procedure, 2D drawings were generated and shared with the ECAD designer for component placement and routing.
Within this outdated methodology, mechanical and electronic design processes were conducted separately. Only late in the development cycle was it possible to exchange critical design data between MCAD and ECAD systems. The limitations in data exchange and the lack of co-design functionality resulted in the need for additional design iterations, driving up development times and costs.
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Just a FYI...Simplified Solutions has released IDF-to-3D. This is a web based tool with an integrated 3D library that allows the user to generate 3D PCBs in 1-2 hours. Use of the tool is free and you can view a 3D PDF of your 3D PCB prior to purchasing the output in STEP format.
For more information, please see www.simplifiedsolutionsinc.com
Yes, there are solutions available today as @RWatkins mentioned but they cost a lot!
I second the need to model Cu traces and lands on the board. It is very much needed for multiple needs including power management, thermal, EMI, etc.
@Rwatkins: Yes, what you mentioned is very much true. I had around 800 parts on my medium size PCB. When I generated step model for it, the size of file was huge. I generally switch OFF 3D models for normal routing. I switch them ON only for verification purpose. This speeds up routing.
Having copper and vias modeled in 3D will be great. Also, when I export Altium 3D model to step model, it removeds some details. The step conversion should also be improved.
3D model incorporation as part of circuit design and board layout is indeed quite valuable as our company can attest, especially when developing housings for portable battery powered devices where size and fit are critical design issues.
There are several packages out there that have some degree of 3D capability in them, ranging from KiCAD (Linux freebie with limited capabilities and a somewhat clunky interface for part models) to the $100,000/seat "high-end" systems.
We have only one major issue related to this with the system we are currently using, Altium, that the PCB library models are stored in flat-file fashion so that changing or adding 3D PCB parts models for a moderate sized library can result in a pretty extreme file size and long storage and retrieval times. This issue becomes more extreme the more complex the 3D models are, for example 120-position board stacking connectors like are available from Hirose.
We have one case currently where we have a 4-board stack 65mm x 75mm each board, with two board-board spaces of 3mm and one board-board space of 2mm, and parts on both top and bottom of several of these boards. Without 3D modeling, the effort required would be daunting to avoid collisions between bottom layer parts on one board and top layer parts on the next board down.
One feature that would be nice, if available, would be to also model the copper on and in the PWB as part of the 3D model, as this would help even further in EMC evaluations using modeling software like HFSS. This copper generation should be an option that is NOT default, because the complexity of the model generated will be extreme, resulting in large files and long processing times.
This is useful in a very specific case, such as example with a structural component in a tight space application. From my experience, the most problem in PCB board design case is a lack of communication between a board designer and a logic designer. It would be a super-duper tool, if this tool can not only handle 3D components on PCB layout, but pull a logic design data from FPGA/ASIC chip library and a backplane file. Could this tool do that? Or already doing it?
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.