Realistically emulating the characteristics in Figure 2 requires accuracy of 1%, so this is the level of performance demanded of a PCM. This appears to have been achieved by the team at Stanford in a repeatable manner. Figure 3 illustrates how the PCM synapse emulation fits into the more familiar PCM characteristics. The left side of Figure 3 shows the conventional two-state resistance range of the PCM, in this case 500 Ohms to 2 M-Ohms.
To add to the challenge, the required 1% or 100 level discrimination of resistance uses only a fraction of the possible resistance range of the PCM. The two bar graphs alongside the normal PCM characteristics in Figure 3 indicate the resistance values used for the demonstration of the 100 levels of resistance and for the synapse emulation experiments. Ignoring stability, it has always been possible to obtain any value of resistance for a PCM by using an incremental write-read verify-write technique. Outside of this work Ferdinando Bedeschi and team  attempt to make multi-bit, 2-bit PCM devices, appear to have fallen by the wayside in terms of the stability required for a commercial PCM array. Although more recently IBM [3 EEtimes] has taken another look at the problems of instability in multi-level 2-bit PCM cell. Compared with those efforts, each PCM in the emulation work of the Stanford group is in effect operating in a repeatable manner as a multi-level > 6 bit memory device albeit, this is under less rigorous conditions than would be required for a commercial device.
The method used by Stanford's team to obtain the 100 levels is shown in Figure 3. As shown, to reset the PCM device a sequence of 100 pulses progressively increasing in value is used, while to set the device a 100 step staircase waveform is used. In the latter case, each individual step of the set pulse consists of 20 pulses. The initial set pulse will consist of 20 pulses of the lowest voltage; the next set pulse will consist of 19 pulses of the lowest voltage and one from the next highest step; then 18 and 2; 17 and 3; and so on for the required 100 pulses. In Figure 3, the two curves of resistance were obtained as the result of successive pulses without reset. The resistance value is, in effect, the integration of the total number of set pulses. The resistance characteristics were proven to be repeatable over many cycles.