You normally use TDR (time-domain reflectometry) to measure impedance change along a signal path (Reference 1). It is also a valuable tool for measuring propagation delays. The TDR technique is applicable to any high-speed circuit. You can use the propagation delay of a high-speed pin-electronics IC in ATE (automatic test equipment) to perform these measurements. These ICs contain high-speed drivers, active loads, and window comparators that operate in excess of 1 Gbps.
To perform TDR, you propagate a fast edge down a signal path and observe the reflection. The reflection shows the impedance along that signal path, as well as the delay that each change in the impedance imposes -figure 1.
In this case, the TDLY is the delay of the PCB (printed-circuit board) run you are measuring, and ZO is the impedance of the PCB run. Using TDR eliminates direct probing of the circuit, which is a difficult procedure because it entails placing probes on the device pins. These probes become part of the high-speed signal path and distort the signal you want to measure. Even a high-impedance active probe can load your circuit.
Rather than using active probes, you can use the TDR measurement capabilities of a Tektronix TDS8000-series oscilloscope with a model 80E04 TDR sampling module - figure 2. The sampling heads have a 20-GHz bandwidth. You also use an Agilent/HP 8082A pulse generator.
You can use an evaluation board from the IC manufacturer for the DUT
(device under test, ). The high-speed inputs to this board are DATA1 and
NDATA1 - figure 3.
Using this setup, you make several measurements. You measure the delay due to the SMA (subminiature Type A) connectors J14 and J13 and the PCB runs under the heat sink. You measure the delay from the output of the IC through SMA connector J18. You measure the delay in the test cable connecting the DUT1 output to the oscilloscope. You measure the total delay from the DATA1 and NDATA1 inputs to the DUT1 output and through the cable to the oscilloscope. The data from these measurements let you calculate the signal delay through the IC.
Because TDR responses can be confusing, you should model the input delays using a Spice simulator - figure 4.
You compare the simulation with actual measurements and model the DATA1 and NDATA1 PCB runs as 6-in. lengths with 65Ω impedances. These traces are intended to be 50Ω runs, but TDR measurements show them to be 63Ω. You terminate the NDATA1 output to ground. Because DATA1 and NDATA1 are symmetrical, with identical lengths to the pins of the IC, you need to measure only the DATA1 PCB run. You also model a 12-in. cable from the generator, although that model is not necessary for the actual propagation-delay measurement. You solve the Spice simulation for the voltage at test point TPv3 - figure 5.
The simulation input signal is a step function with a 0.5V amplitude. This amplitude emulates the TDR signal from the oscilloscope. You can read the time delays for various elements in the model directly from the horizontal axis.
The part of the waveform labeled Step 1 represents the 12-in. cable from the pulse generator. The simulated delay time is about 3 nsec—twice the actual delay of 1.5 nsec. The part of the waveform labeled Step 2 represents the delay for the DATA1 PCB run. The simulation shows a delay of approximately 2 nsec—twice the actual PCB delay of 1 nsec. The other delays represent reflections of the pulse through the DATA1 PCB run.
The impedance of these various elements is proportional to voltage, as the Y axis indicates. The X axis represents signal reflections due to the single-input step signal directly in time. You can compare this simulation with the ideal version of this signal ().
Use the following procedure to measure the propagation delay through the IC. First, measure the delay of the 2-in. SMA cable that attaches the DUT1 node to the oscilloscope’s vertical input (). Connect the 2-in. SMA-to-SMA cable to one input of the TDR module, leaving the other end open. You make the measurement using the TDR pulldown menu. Note that the waveform looks like the “open” example in . Because the 804-psec delay is twice the delay of the cable, the equivalent “cable length” is 402 psec. Also note that the second waveform step is exactly halfway between the top and bottom steps. Recalling the TDR basics, this fact indicates that the impedance of this 2-in. cable is truly 50Ω.
You next measure the delay and impedance of the PCB run associated with the DATA1 input signal (). You should verify the accuracy of the model by comparing this waveform with the simulation of . You set the cursors to measure the impedance of the trace. The first waveform step is 50Ω, representing the cable from the oscilloscope. The second cursor shows an impedance of 97.8Ω, representing the value of the IC’s internal 100Ω resistor that connects across DATA1 and NDATA1, which RL1 in represents. The impedance of the second waveform step measures 63Ω, meaning that the PCB runs for DATA1 and NDATA1 were not designed to be 50Ω, as you would expect. The 150Ω level for the third reflection represents the sum of delays for the 50Ω cable and the 100Ω resistor.
To make this measurement, connect one end of the 12-in. SMA cable to the oscilloscope and the other end to the DATA1 SMA input connector on the evaluation board. You should ground the NDATA1 SMA connector with an SMA ground, as shows. The SMA cable should be as short as possible, but its length is irrelevant to the propagation-delay measurement.
You need not apply power to the evaluation board. The measurement was made with the IC soldered onto the board and no power applied. Some users prefer to make this measurement without soldering the device. Disconnecting the IC simulates an open condition, as shows, and produces a cleaner three-step signal. The delay-time measurements are the same in either configuration.