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Argument for anti-fuse non-volatile memory in 28nm high-K metal gate

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scva550i
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re: Argument for anti-fuse non-volatile memory in 28nm high-K metal gate
scva550i   10/18/2011 4:52:25 AM
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I think people here are looking for technical data not a marketing piece!

scva550i
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re: Argument for anti-fuse non-volatile memory in 28nm high-K metal gate
scva550i   10/18/2011 4:32:59 AM
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That's a very big claim especially from a company which doesn't own the process. I think you're talking from historical point of view, otherwise, can you be more specific on how your technology is better in 22nm or beyond? There are so many variables in a new process. I don't think anyone can make such a claim with high confidence not even with the companies which own the process!

jmcleod
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re: Argument for anti-fuse non-volatile memory in 28nm high-K metal gate
jmcleod   10/17/2011 9:38:22 PM
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Hi Kiran, Yes, the technology gets better with each process shrink.

jmcleod
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re: Argument for anti-fuse non-volatile memory in 28nm high-K metal gate
jmcleod   10/17/2011 9:37:27 PM
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Hi, I noticed a couple of folks asking about reliability of the anti-fuse. Please see another article from Andre where he addresses this issue: http://www.techdesignforums.com/eda/eda-topics/tested-component-to-system/ensuring-the-reliability-of-non-volatile-memory-in-soc-designs/ Thanks for your interest. Jonah

R G.Neale
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re: Argument for anti-fuse non-volatile memory in 28nm high-K metal gate
R G.Neale   10/16/2011 9:52:58 AM
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I wonder if the Andre Hassan would care to provide what he thinks (or preferably from experimental evidence) the numerical values of voltage-current (V-I) electrical characteristics of the fusing step and how this would change with scaling. With respect to reliability where does he think the debris, especially the dielectric, will reside after programming? Is it proposed that the programming step would alloy all of the ill-defined corner edge of the source/drain contact, if not is there a possibility that if the anti-fuse link failed the transistor would start to operate as normal? I really raise this point because the movement, direction and final resting place of particles of dielectric or of other solid crystal material particles in molten semiconductor, in regions of high current density or electric field, is of particular interest to those involved in the reliability and operation of phase change memory (PCM). In the past in more symmetrical silicon-dielectric-silicon anti fuse structures (Actel) the dielectric finished in an annular dome-like region. I referenced this in Figure 4 http://www.eetimes.com/design/memory-design/4212344/PCM-Progress--Temperatures-rise-and-constituents-on-the-move?pageNumber=2. Any experimental evidence the author can provide with respect to any of the above would be of interest and make it easier to assess the potential value of his case.

elctrnx_lyf
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re: Argument for anti-fuse non-volatile memory in 28nm high-K metal gate
elctrnx_lyf   10/16/2011 7:30:08 AM
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will the use antifuse technology will go up in the 22nm process?

resistion
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re: Argument for anti-fuse non-volatile memory in 28nm high-K metal gate
resistion   10/16/2011 4:22:17 AM
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Although I'm willing to believe antifuse is reliable, haven't seen any retention data to confirm.

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