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Optimize SDR performance

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DrFPGA
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re: Optimize SDR performance
DrFPGA   12/31/2011 6:12:02 PM
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It is great to see some simulation results in detail. Too often articles don't give enough background and specifics like this one does. Thanx!

Paul Stoaks
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re: Optimize SDR performance
Paul Stoaks   12/22/2011 7:42:19 PM
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This is a good article and it addresses a thorny problem for SDR design. Getting the RF, modulation, and EC behaviors correct is critical to waveform success. The recent drone capture in Iran actually highlights the importance of this, in my opinion. Noise and jam resistance are critical features of a good waveform. Another area of great interest to SDR designers is the optimization of the waveform at the baseband and networking level. Modern waveforms face daunting requirements in these areas and engineers need tools to assist in ensuring that designs "fit" into the target hardware platfroms. Foresight Systems M&S (www.foresight-mands.com) helps engineers optimize the mating of waveform software and hardware. Using our Resource Aware Modeling and Simulation (RAMS) approach, we can predict memory and processor utilization, jitter, latency, etc. enabling engineers to effectively optimize the waveform design.

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