The use of processor cores is very popular throughout the electronics industry. An IC integrator has many things to worry about, but testing the processor core should not be one of them. You can structure the test aspects of the core in a manner that makes them effective and predictable, regardless of the IC design. Here, I will discuss a test strategy that you can use with any core, although I will focus on ARM cores because they are used in so many designs.
Cores generally can be implemented along with user logic in an IC and tested as one entity of the overall IC design. An effective test strategy for the core can provide lots of design flexibility. A few implementation approaches can make a big difference in the IC test strategy.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.