Increasing clock speeds, coupled with high-frequency bus and interface data rates, make pc board design significantly more challenging. Engineers have to look beyond the design of the actual logic on the board to other factors that can affect circuits, such as board size, environmental noise, power consumption and electromagnetic compatibility (EMC). Hardware engineers should address EMC issues during the pc board design phase to ensure a system free of EMC faults.
A well-grounded design
A low-inductance ground system is the most vital element for minimizing EMC problems. Maximizing the ground area on a pc board reduces the inductance of ground in the system, which in turn reduces electromagnetic emissions and crosstalk. Crosstalk can exist between any two traces on a board and is a function of mutual inductance and mutual capacitance proportional to the distance between the traces, the edge rate and the impedance of the traces.
In digital systems, crosstalk caused by mutual inductance is typically larger than the crosstalk caused by mutual capacitance. Mutual inductance can be reduced by increasing the spacing between the traces or by reducing the distance from the ground plane.
Signals can be connected to ground using various methods. A board design in which components are connected randomly to ground points generates high ground inductance and leads to unavoidable EMC issues. Use of a full ground plane is recommended because it minimizes impedance as the current returns back to its source, but the ground plane requires a dedicated pc board layer, which may not be feasible for two-layer boards.
Designers thus are advised to use ground grids, as shown in Figure 1a. The inductance of ground in this case will depend on the spacing between the grids.
The way a signal returns to system ground is also important. When a signal takes a longer path, it creates a ground loop, which in turn forms an antenna and radiates energy. Therefore, every trace carrying current back to the source should follow the shortest path and must go directly to the ground plane.
It is not advisable to connect all the individual grounds and then connect them to the ground plane; doing so not only increases the size of current loop but also increases the probability of ground bounce. Figure 1b shows the recommended method of connecting components to the ground plane.
Another good mechanism for reducing EMC-related problems is a Faraday cage, formed by stitching the ground along the complete periphery of the board and not routing any signal outside that boundary (Figure 1c). The mechanism restricts board emissions to the area defined by the boundary, while preventing external missions from interfering with signals on the board.
Proper arrangement of the layers is also vital from an EMC point of view. If more than two layers are used, then one complete layer should be used as a ground plane. In the case of a four-layer board, the layer below the ground layer should be used as a power plane. Care must be taken to locate the ground layer between high-frequency signal traces and the power plane.
If a two-layer board is used and a complete layer of ground is not possible, then ground grids should be used. If a separate power plane is not used, then ground traces should run in parallel with power traces to keep the supply clean.
|Figure 1. When a dedicated ground plane is not feasible, ground grids can be used instead (1a). It is not advis- able to connect the individual grounds and then connect them to the ground, however, because doing so increases the size of current loop as well as the probability of ground bounce (1b). A Faraday cage, formed by stitching the ground on the complete periphery of the board and not routing any signal outside the defined boundary (1c), restricts board emissions to the area within the boundary while preventing external emissions from interfering with signals on the board.|