Design Con 2015
Breaking News
Design How-To

On-chip frequency measurements reduce test time

NO RATINGS
More Related Links
View Comments: Newest First | Oldest First | Threaded View
sam320
User Rank
Rookie
re: On-chip frequency measurements reduce test time
sam320   5/14/2012 12:10:07 PM
NO RATINGS
Hi agk, thanks for the comment. Obviously if the target clock is the same as the timer clock, it will not work. The article addresses this and mentions that the timer must be running at twice the frequency of the clock being measured. On a system there can be multiple clock sources and if all of them are measured using on-chip timers, test time savings will be much higher. Please continue to post comments, we appreciate it.

agk
User Rank
Rookie
re: On-chip frequency measurements reduce test time
agk   5/10/2012 11:30:20 AM
NO RATINGS
The author uses the on chip timer to measure the frequency of the clock generated.The on chip timer works on the same clock which we want to measure. So definitely this is not the right method.

Radio
LATEST ARCHIVED BROADCAST
EE Times Senior Technical Editor Martin Rowe will interview EMC engineer Kenneth Wyatt.
Top Comments of the Week
Like Us on Facebook

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)
EE Times on Twitter
EE Times Twitter Feed
Flash Poll