With the advent of new highly computing-intensive mobile applications (high throughput and software-defined radio, high-resolution video streaming, 3D image processing, augmented reality…), current system-on-chips (SoCs) are quickly moving towards many-cores for increasing parallelism. As a result, the number and distance of communications between these cores are growing exponentially. This point is explaining the relative importance of communications which can account for up to 30 percent of overall energy consumption in the highest performing many-core architectures.
From multi-cores to many-cores For achieving high-performance systems, it is well-known that the race towards higher frequency has moved towards a race in terms of number of cores. This is true for desktop, but also for laptop, tablets and mobile phones with an even quicker evolution speed. Figure 1 shows a typical evolution of current SoCs: A multi-core host processor is used for sustaining the required performance for web applications while a sea of Processing Engines (PE) is used for sustaining highly parallel and computing-intensive applications. Then, each application will use parts of these PE in a configurable manner, while the corresponding software stack will run on the host processors.
Figure 2 shows International Technology Roadmap of Semiconductors (ITRS) view in terms of number of cores in embedded systems. The trend is clear: the number of processing engines will be exploding in the next years. PE, typically 250 kgates and 64 kbits of memory, will be more or less flexible and the full architecture will be most probably heterogeneous with some PE dedicated to some parts of an application while others will be general purpose for providing a good level of flexibility.
Two important constraints have to be considered: Time-To-Market (TTM) and power consumption. The two points are linked to communications between PE. Indeed, SoC design is clearly moving from Intellectual Properties (IP) or blocks reuse to platform reuse in order to minimize software development efforts for TTM reasons. Communications represent the key point to master for platform reuse. They must bring the correct flexibility, throughput and latency on heterogeneous types of cores while limiting their power consumption. Energy spent in communications can account for up to 30 percent in current SoC and is growing similarly to the number of cores. To cope with these issues, new and more efficient communications paradigms are needed.
Figure 2: Number of cores evolution in embedded systems (Source: ITRS 2011)
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.