Individual cells are connected in series and parallel to form a panel. Panels are connected in series and parallel to form a photovoltaic array. Connecting cells in series increases the voltage. Connecting them in parallel increases the current. If an individual cell has a forward drop of 0.5V and with a given illumination produces 100mA, connecting 50 cells in series would produce a 25V string. Connecting 60 of the strings in parallel would produce a 25V, 6A panel. If each panel could deliver 150W, connecting 50 panels on a rooftop would deliver 7.5kW.
The four key parameters of a solar panel are:
Voc, the open circuit voltage where Iout = 0, Pout = 0
Isc, the short circuit current where Vout = 0, Pout = 0
Vmp, the output voltage at when the power extracted is maximum
Imp, the output current when the power extracted is maximum.
In Figure 6 the red curve is the current as a function of voltage and the green curve is the power as a function of voltage along with the location of the maximum power point.
In the solar cell (or panel) equivalent circuit the parallel resistor Rp affects the slope of the current vs. voltage curve at Vout = 0. For an ideal panel, Rp = ∞ and the slope is zero. Series resistor Rs affects the slope of the power vs. voltage curve at Vout = Voc. Ideally Rs = 0 and the slope is infinite.
4. Transferring maximum power from a panel
The objective is to find the maximum power point (MPP) and always operate the panel voltage and current at that point. The MPP will vary with irradiance and temperature. Decreasing irradiance is represented by a lower Isc. As Isc reduces, the MPP moves to a lower voltage. As temperature increases, Vmp reduces and the maximum power gets less. Voc, Isc, Vmp, Imp and the effects of temperature are shown in the panel manufacturer’s datasheets. A method is needed to dynamically track these changes as the panel environment changes and always operate the panel at the maximum power point, regardless of external factors.
Since the equivalent circuit of a solar panel is represented by a current source with parallel and series resistances, the Thevenin equivalent circuit can be shown as a voltage source with a single series resistance. To transfer maximum power from the voltage source to the load, the load resistance must equal the source resistance. Figure 7 shows the I-V curve and the load line R2 with the proper slope that intersects the I-V curve at the MPP.
This is easily accomplished with the STMicroelectronics SPV1020 boost converter with embedded maximum power point tracking (MPPT).
The SPV1020 DC-DC boost converter with embedded MPPT is an active power optimizer. Its purpose is to increase the output voltage from a panel while simultaneously adjusting the panel’s output voltage to Vmp. This optimizes or maximizes the power extracted from the panel. The converter’s output voltage is set by the user. The converter’s duty cycle is determined by the Perturb and Observe MPPT algorithm. The converter’s input voltage (or panel’s output voltage) is the dependent variable and is set by the formula:
Vin = Vout * (1-duty cycle)
In the SPV1020, the duty cycle starts out at a low value of 5 percent. The input voltage and input current are measured and power calculated. Then the duty cycle is increased. The new input voltage is measured and input power calculated. If the new power is greater than the old power the duty cycle is increased again. This process continues until the new power does not change or is less than the old power. If the new power does not change, that is the maximum power point. If the new power is less than the old power, the duty cycle DECREASES and the process is repeated, until the new power equals the old power, and the maximum power point has been determined. In this case the converter will be operating at the top of the power vs. voltage curve as shown in Figure 8.
This Perturb and Observe algorithm runs continuously, at 256 times the switching period. The switching frequency is by default 100 kHz. The switching period is 10 microseconds and the MPPT algorithm is updated every 2.56 milliseconds.
Your article is a little over my head but from the financial stand point there are 3 points that I always consider when debating between central inverters and micro inverters. Micro inverters are preferred when you need module level monitoring (monitoring the performance of each individual solar module), when partial array shading occurs, or when the design is constrained by locating modules sections of the roof with different orientation. If non of the above are true I usually recommend a central inverter. You can compare prices anywhere online: http://webosolar.com/store/en/80-microinverters
until the cells get unbalanced and your 1% advatage quickly disapeers and micro inverters win on efficiency for both momentary cell inbalance (think clouds, bird droppings...) Or if a cell degrades or is mismatche power can actually drop in a cell in a series string.
You have stated “As the cell voltage rises, the current in the internal diode rises, leaving less of the photo current for the load”. This is not so. If you follow the panel I-V curve shown in Figure 6 when the cell voltage increases the cell current decreases. The maximum cell voltage is the open circuit voltage, Voc, where the current is zero.
The maximum power available from the panel does not change but the power that is actually extracted from the panel does change and it is a function of the load resistance RL. This maximum power point occurs when RL = Rs. The boost converter decreases the value of RL by adjusting its duty cycle. The input resistance seen by the panel is RL x (1-du)^2 where du is the duty cycle internally set by the SPV1020. The SPV1020 duty cycle is internally adjusted so that RL x (1-du)^2 equals the panel output resistance Rs.
RL will normally be much greater than Rs.
Interposing the SPV1020 boost converter between the panel and RL decreases the load resistance seen by the panel. The load resistance seen by the panel Rin = RL x (1-du)^2 where du is the duty cycle internally set by SPV1020. The duty cycle is set by the SPV1020 so that RL x (1-du)^2 = Rs, the source resistance of the panel.
Actually the microinverter method is less efficient than power optimizers and a large central inverter because 1) the voltage is higher and current lower which reduces I square R losses and 2) due to economies of scale there is less overhead and fewer number of components along with control circuits. The efficiency of the SPV1020 power optimizer is 98% and the efficiency of one large central inverter will be more than multiple microinverters.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.