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The basics of FPGA mathematics

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I_B_GREEN
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re: The basics of FPGA mathematics
I_B_GREEN   8/12/2012 8:48:13 PM
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Yes but when writing code how do you know the outcome? don't you have to assume worst case?

Adam-Taylor
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re: The basics of FPGA mathematics
Adam-Taylor   8/13/2012 7:14:35 PM
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Whether writing code or designing hardware one should always ensure it works in the worse case. With code you need to ensure you hit all of the corner cases. You can model it in excel, matlab or mathcad etc to ensure the worse case is captured.

larsen
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re: The basics of FPGA mathematics
larsen   8/13/2012 9:56:00 PM
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If you do financial calculations for instance, then better design for worst case, but when it comes to FIR filter for signal processing, designing for the absolute worst case with respect to maximum amplitude at the input is not always necessary. To illustrate: Take a narrow band FIR filter (f0). The maximum output ampltude will be with a sinewave at the centre frequency f0. But if you know that such an input signal will never be present in practice, then you can relax on the maximum supported ampltude and discard some MSB as illustrated in my small numeric example with modulus arithmetic. A realistic example of such an input could be if the sinewave at f0 is always accompanied by other signals - noise for example, then you know that the input sinewave can never fill the whole input amplitude, because if it did, there would be clipping or overrun already at the input. The out-of-band (f0) signals would be filtered away in the FIR filter and give little contribution to the output - only the sinewave at f0 gets through. I.e. the net result is that you can spare some of the MSB's without damaging your signal. But again, using saturation type of adders in the intermediate results would result in distortion at a lower input level than without saturation. To determine if the filter is properly designed you would need to simulate or at least be prepared to do some iterations of test and redesign.

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