There is an increasing interest in the use of solid-state based X-ray medical imaging and detection systems in the replacement of conventional diagnostic imaging techniques. One of these technologies is wafer-scale CMOS sensor-based imaging, which can bring key advantages in terms of performance such as high resolution, high dynamic range and low noise capabilities. Additionally, it can offer significant system cost advantages for X-ray imaging applications, although it can come with an initial penalty in terms of design complexity in the development of the CMOS sensor.
Image sensor target area Because of the absence of a lens for CMOS-imaging-based X-ray applications, the size of an image sensor has to match the size of the target area. A sensor measuring 139x120mm, for example, is usually adequate for some medical applications such as extra-oral panoramic dental imaging. However it is not sufficient for most medical applications such as mammography, which requires a sensor that is approximately 290x240mm in size. For chest radiography or other applications such as full body scanning for security purposes, an even more extensive sensor area is likely to be necessary. Therefore, imaging applications such as X-rays will require a field of view in excess of that covered by a single-wafer based imager – even if the sensor is manufactured using 300mm wafers, the largest wafer size commercially available today. Therefore, several sensors need to be ‘tiled’ to meet application needs. Although this approach can generate ‘dead’ or ‘low-sensitivity’ lines, such single-line defects can be tolerated in most applications. At the edge of the wafers, the goal is to lose not more than one line of pixels, so that tiled versions will still generate high-quality images. A three-sided ‘buttable’ sensor design Based at the Science and Technology Facilities Council’s (STFC) Rutherford Appleton Laboratory at Harwell in the UK, the CMOS Sensor Design Group has been designing full-custom image sensors for scientific applications since the 1990s. It has developed a high-resolution and radiation-hard waferscale digital CMOS image sensor prototype aimed at use in X-ray medical imaging and more specifically mammography and digital tomosynthesis, the advanced diagnostic technique that is used to generate 3D representations of patients or other scanned objects. A unique feature of this sensor is that it has sensing pixels right up to the edges on three sides. This allows multiple sensors, manufactured on cost-effective 200mm silicon wafers, to be ‘butted’ or ‘tiled’ together in a 2x2 arrangement to form a significantly larger imaging area and to meet the requirements for mammography applications. Additionally, any 2xN sensor arrangements are possible, thus making the device ideal for applications that demand even larger area coverage, such as chest imaging or security scans.
Traditionally, CMOS imagers have the required electronic circuitry implemented on two sides of an imaging array to address the individual sensor pixels. To achieve this three-side ‘buttable’ design, the design group developed innovative electronic circuitry intellectual property to implement the necessary pixel readout and row-addressing driver functions on just one edge of each sensor – see figure 1 - with extra circuitry embedded in the actual pixel array; while, crucially, also maintaining a high degree of image quality.
Fig. 1: A three-sided ‘buttable’ sensor design
with readout circuitry designed on one single edge allows for the
sensors to be ‘tiled’ together in a 2x2 arrangement.
Join our online Radio Show on Friday 11th July starting at 2:00pm Eastern, when EETimes editor of all things fun and interesting, Max Maxfield, and embedded systems expert, Jack Ganssle, will debate as to just what is, and is not, and embedded system.