FPGA programmability has traditionally been supplied at the board level
with a separate packaged device. Holt said attempts had been made to
include separate logic and FPGA die in one package but with less
success. Die-level integration is the next stage of that integration
evolution, Holt argued.
By way of an illustration of the
Achronix IP offering Holt flashed up three embedded FPGA (eFPGA) macros
with between 100,000 and 1 million effective gates and occupying between
2.1 and 19.2 square millimeters in Intel's 22-nm FinFET process.
However, Holt admitted that most of the customers Achronix is engaged with
today are looking for custom FPGA fabrics.
In his presentation
Holt said: "Depending on the performance and power requirements, the die
area for some of these fabric components can be reduced by up to 40
percent. We are also planning to support advanced TSMC processes in
Holt also admitted that while its IP business line will be
foundry agnostic, all its present IP licensees are targeting TSMC. He
added that Achronix could probably get customers to market faster with
an Intel-produced chip as the FPGA fabric is fully characterized. "Intel
foundry is not averse to this if the volumes are right," Holt said.
doubts about the approach remain. One is how to connect the FPGA
fabric into the on-chip bus to guarantee to provide suitable additional
resources for all the disruptions the design team might be trying to
Holt said Achronix now envisions three EDA
design flows in support of its FPGA technology. The first is the
standard flow that allows engineers to program Achronix FPGAs down to
the RTL level, which Achronix has offered since 2008. The second is an integrated
SoC/FPGA design flow to support the addition of FPGA fabric in SoCs and
allow the fabric to be programmed. The third EDA flow will extend that
FPGA fabric programmability to users to support functional
Achronix' current business plan of record is
to conduct an initial public offering in 2014. To achieve that, Holt
reckons the company will need $100 million of annual sales and 70-plus
percent gross margins. "I want to stay high margin, to get into
handsets," he said.
October is always a troubling month in a Semi cycle trending lower and with cuts looming at AMD and Xilinx announcing cuts in discretionary spending. What they are implying is that they are open to licensing their FPGA fabric to the big 2 - XILINX and ALTERA; other than that the only other player would be Broadcom that is still digesting Netlogic Microsystems; Since their products are geared for high performance and are very expensive it may be a sign from their VCs pushing Management to sign on more customers. Someone may take them out for Pennies on the $
Desperation move. Guess they don't have enough customers for the FPGA. Now they are going to have to shift engineering resources to explaining how the fabric works to the likes of TSMC.
Look for an early demise for this company, Intel or no Intel.
Thanks for the additional insight.
It is the case that very few FPGA fabric licensors have been successful....but some FPGA vendors have turned themselves into application-specific chip vendors.
John Lofton Holt claimed that FPGA fabric licesing would not conflict with selling high-performance FPGAs as the markets, volumes and economics are different.
To the last comment, in addition to IBM, in 2001, Adaptive Silicon launched its licensable programmable logic IP core. We found lots of interest, but the 2001 financial crash limited additional funding, and the company had to close down in 2002. Also with the programmable core taking about 100X the area of custom logic on a gate for gate basis,its use needs to be restricted to flexible IOs, and smaller functional blocks. But conceptually, using reconfigurable cores is better than taping out half a dozen different variants of the same part. Eventually, the technology re-emerged in standard part company Stretch, Inc.
It could be the largest monolithic FPGA. The Xilinx Virtex-7 2000T is ~6.8B transistors but is implemented as 4 dice on an interposer.
It would be interesting to hear what became of the 2002-era IBM offering of Xilinx FPGA cores in their 90nm ASIC products.
Thats really a nice sign. The importance of eFPGAs IP is undeniable.
Indeed the effective connection/interfacing of the 3rd party eFPGA IP with SoC will be a challenge (compared to HardARM FPGAs of Xilinx, Altera), but is much needed move forward for Industry to bring the custom programmablity power of FPGAs in SoCs.
An interesting point is almost all FPGA vendors are/have converged to TSMC. If eFPGA IP marriage really succeeds and SoC-FPGA bet of Xilinx/Altera shoots off, who knows, perhaps in 5 years FPGA vendors augment a competitive eFPGA IP offering too in their business line.
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