LONDON – XMOS Ltd. (Bristol, England), a pioneer in C-level programmable event-driven, multicore processors, is launching tools and IP that are part of a repositioning of the company as a high-end microcontroller company.
The company reckons that the parallelism of its chips it can provide up to ten times the performance of leading 32-bit microcontrollers (MCUs) at a similar price point.
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The company has upgraded the Eclipse-based xTIMEcomposer Studio development environment to version 12.0 and moved it across from GCC- to LLVM-based C and C++ compilation. The move has produced marked improvements in compile time (40 percent), run-time performance (60 percent) and reduced code size (17 percent) over the previous version.
The company is also launching the xSOFTip library. This is a range of more than 40 software blocks for the implementation of peripheral functions including interfaces, DSP routines and communication protocols. A free-to-download GUI-based tool called xSOFTip Explorer allows developers to easily browse available xSOFTip blocks and quickly configure xCORE devices with the interfaces and peripherals they need. It has a drag-and-drop interface and provides feedback on chip resources used together with online documentation and example device usage.
Still downloadable at present the vision is to have xSOFTip as a web-based design entry tool, said Ali Dixon, co-founder and director of product management at XMOS.
The new IP and design flow is going to increase the market reach of XMOS silicon, the company said. In its six years to date the company has achieved traction in some audio and control applications that are suited to its highly responsive and deterministic processing style. XMOS is now aiming to address a broader range of embedded applications that demand real-time performance beyond the capabilities of traditional microcontrollers (MCUs).
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How XMOS positions itself in a $76 billion market opportunity
For now XMOS tools support the same set of chips the company has been offering. Nigel Toon, CEO of XMOS, said that over the next six months there will be more XMOS components. The company has used a 65-nm digital process for the event-driven processors with the option to include application-specific mixed-signal die that provide dedicated physical interfaces and additional functions in a more relaxed manufacturing process.