The introduction and continued use of crystallized active material as one electrode in modern phase change memory (PCM) cells offers a number of fabrication benefits. An investigation designed to search for evidence of electro-crystallization effects suggested an unexpected result—that the poor data-retention characteristics of PCM devices at elevated temperatures are not just an unfortunate phenomenon, but are caused by the designs of present-day structures. Furthermore, because crystal growth rates do not scale with lithography, elevated-temperature data retention (ETDR) performance may be dependent on device structure, making untested predictions of PCM ETDR with lithographic scaling unsafe.
The basis of this investigation is the use of a novel approach that establishes a link between ETDR results and parameters associated with the PCM “set” operation (the writing of the memory to its low resistance crystallized data state). This approach offers the possibility of determining whether the “set” pulse for a particular PCM device structure is optimized in terms of the time and the temperatures involved. The “set” time makes a significant contribution to the total PCM write data bandwidth; thus, to be able to reduce that by optimization would represent a useful step forward.
Linking “set” and data retention
Although not usually linked to the PCM “set” operation, the starting points for this investigation are the published accelerated ETDR testing results for PCM devices. In the case of a PCM device, the mechanism that determines an ETDR failure of the reset, or high-resistance state, is fundamentally the same as the mechanism on which the PCM device depends for its operation, i.e. crystallization. That alone is too superficial to be the key to the approach to be described here, however. What was necessary was to find a more detailed structurally dependent feature that would provide a closer link or common factor to both the “set” and ETDR mechanisms.
The initial step of this investigation is that instead of extrapolating the ETDR test results to longer times, we back extrapolate them to shorter times; that is, to those times (on the order of 100 ns) associated with the programming “set” step of a PCM and beyond (see figure 1). A simple explanation of my methodology is illustrated in figure 1; the three data points of a typical ETDR test on a PCM device are shown as red squares. Those data points usually extend over about two decades as a plot of log t = 1/kT, where t is time to failure, T is temperature, and k is the Boltzman constant; they are then forward extrapolated over four or five decades to obtain the time (in years) and operating temperature limits for data retention.
Figure 1: In this outline of the back extrapolation process, the black line represents a fully “set” device, while the blue line shows the data extrapolated back to the 100-ns regime based on the three data points of a typical ETDR test on a PCM device (red squares). At the value of 1/kT for the melting temperature Tm, the “set” line goes to infinite time, indicating the minimum set time. The green arrows illustrate the way in which device size and scaling displaces the fully “set” line (black squares) and its extrapolations.