Design Con 2015
Breaking News
Design How-To

MEMS device downsizes clock generator

10/23/2012 12:05 PM EDT
6 comments
NO RATINGS
More Related Links
View Comments: Oldest First | Newest First | Threaded View
psevalia
User Rank
Rookie
re: MEMS device downsizes clock generator
psevalia   10/23/2012 11:00:47 PM
NO RATINGS
Hi Colin - SiTime (www.sitime.com) introduced MEMS-based clock generators (with no external MEMS or quartz) in 2009 and have been shipping in volume since 2010. The three devices (SiT9103, SiT9104, SiT9105) offer single-ended, differential or a combination of single-ended and differential clocks respectively and can support many interface protocols including PCI. The single-ended frequencies go up to 220 MHz and differential frequencies go up to 800 MHz. Differential standards support LVPECL, LVDS, CML and HCSL. Please see links below for more information. http://www.sitime.com/products/clock-generators/sit9103 http://www.sitime.com/products/clock-generators/sit9104 http://www.sitime.com/products/clock-generators/sit9105 Thanks Piyush Sevalia Exec VP, Marketing, SiTime Corp.

gsdg90
User Rank
Rookie
re: MEMS device downsizes clock generator
gsdg90   10/24/2012 1:31:21 PM
NO RATINGS
MEMS oscillators are a bizarre market. It is an interesting technology that offers little value (with the exception of shock and vibe) to the customer. While MEMs does offer a solid advantage in microphones and motion-sensing, overall oscillator performance (including the new breed of piezo-actuated devices) only compete with incumbent technologies when David Copperfield math is performed. The price advantage seems completely artificial when one considers the complete picture.

wishboneash
User Rank
Rookie
re: MEMS device downsizes clock generator
wishboneash   10/24/2012 3:38:00 PM
NO RATINGS
There is the problem of a fractional-N PLL to bring the frequency within tolerance. This adds jitter and power. Quartz still reigns when it comes to high-performance frequency generation. Solutions getting rid of the frac-N PLL will eventually beat out companies like Discera and SiTime. And there are a few companies already out there using CMOS based or other forms of tuned resonators. The quartz solution gets rid of the need for two cascaded PLLs needed when the output frequency is the GHz range. A single PLL coupled to an external quartz xtal or VCXO will have much better performance with less power.

gsdg90
User Rank
Rookie
re: MEMS device downsizes clock generator
gsdg90   10/24/2012 5:33:45 PM
NO RATINGS
Agreed that the frac-n approach is very problematic. Integer-N approaches rely upon a tunable reference oscillator which is stabilized across temperature and process. That works in the lab at low volume for short periods of time, but it is a million miles from capitalizing upon mature and well understood semiconductor processes. Quartz has nothing to fear, as these integer-n approaches are just science projects.

wishboneash
User Rank
Rookie
re: MEMS device downsizes clock generator
wishboneash   10/24/2012 9:37:01 PM
NO RATINGS
Have to agree. MEMS timing devices are a solution looking for a problem. MEMS technology is better served for accelerometers, sensors and other miniaturized devices where the competing solutions converting mechanical to electrical signals are not viable or too expensive (in smartphones, tablets, automobiles etc).

docdivakar
User Rank
CEO
re: MEMS device downsizes clock generator
docdivakar   11/13/2012 5:52:25 PM
NO RATINGS
The opinions of commentators above seem to indicate MEMS timing devices are currently not a replacements for OCXO' or TCXO's and/or other non-MEMS timing devices that appear to have cost & performance advantages. It would be nice to see poster's like @psevalia contribute a comparative study of this... MP Divakar

Flash Poll
Like Us on Facebook

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)
EE Times on Twitter
EE Times Twitter Feed
Top Comments of the Week