SANTA CLARA, Calif. – STMicroelectronics said its ST31 series of dual-interface microcontrollers is based on the SC000 processor core licensed from ARM Holdings and is intended for use in contactless operations such as transport cards.
The ST31's low-power consumption helps in contactless applications in which the card circuitry is powered by RF energy from the reader. A single-interface version of the ST31 is also available for contact-only application is also available.
The SC000 combines Cortex-M0 microcontroller features with security features of ARM SecurCore
processors. The ST31 chips are compliant with EMVCo and Common Criteria EAL6+ security certifications, are capable of supporting recognized cryptography algorithms such as DES, AES, RSA and ECC.
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The chips are produced in a 90-nm manufacturing process technology with support for EEPROM non-volatile memory. The chips offer from 16-kbyte to 52-kbyte of on-chip EEPROM and 3.4-Mbit/s contactless data rates.
The ST31 series is sampling and scheduled for certification in April 2013, ST said.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.