Smart grids need to secure all elements that may interact with smart meters—like data concentrators, intelligent electronic devices (IEDs) and secure gateways. High-performance smart meter reference designs must be constructed with physical security measures in the design’s frame as well as the most robust, rugged components available in order to ensure safety of the data and its communication with other parts of the overall system. Smart meter components must have an Ingress Protection Security rating of 67 (IP67-rated), which signifies that the unit is dust-proof and water resistant.
Switch design benefits
Switches that can be used in either multi-converter or single-converter designs benefit product design. Cost-effectiveness is another important aspect of a switch from both an installation and consumer standpoint, considering that smart meters will require maintenance and to ensure proper data reporting over their life spans. In-service testing has changed over the years as electronic meters have been incorporated within utility service areas.
Low-profile detect switches, such as C&K’s KSE Series, provide anti-piracy protection and are available in a wide range of sizes. Miniature switches are well suited to deliver permanent detect condition at extreme temperatures with fast recovery times below 250ms. Ultra-low profile detect switches that allow for X- or Y-axis actuation and have low heights are valued among designer, as switches are needed for set-up, selection, and reset functions. For pairing and coding functions, ultra-miniature half-pitch switches with side-actuation and bifurcated contacts mean increased electrical reliability, providing rotary, binary-decimal and hexadecimal coding. Common standards for single pole single throw (SPST) are based on a force of 1.5 ± 0.5N, tactile travel of 0.3 +0.1/-0.2mm, and operational lives of at least 300,000 cycles. Maximum power ratings needed for smart meters rarely exceed 1VA. Switches used within the meter must have maximum voltage ratings of 32VDC and operating temperature ranges of -40°C to 85°C in addition to the IP67 seal.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.