Design How-To

# High-yield, high-performance memory design

New method for improving yield

**New method for improving yield**

What is needed:

- Statistical MOS models which are sufficiently accurate to start to make useful yield predictions of memory circuits. The models don’t need to be perfect (models are never perfect!), but they must be systematically predictive: an improvement in predicted yield should correspond to an improvement in measured yield, even if there is a systematic offset between predicted and actual yield.
- A way to estimate yield of high-sigma memory components (bitcells, sense amps, etc), and to estimate yield at the memory system level too. It must be fast, accurate, and scalable enough to handle accurate models of variation. It also needs to be easy for designers to trust and adopt; for example, familiar, like standard Monte Carlo sampling, rather than messing around with the sampling distribution... but somehow not needing 1 billion simulations!

It has been shown by Solido Design Automation that these needs can be met and address yield issues such as with TSMC 28nm, and below processes. This solution has been shown to work at TSMC and at a number of their top customers.

The solution’s core is accurate statistical MOS models with TSMC models and PDKs combined with Solido’s “High-Sigma Monte Carlo” tool.

- TSMC 28nm PDKs have more accurate statistical MOS models. They use the “Back-Propagation of Variance” approach (Drennan and McAndrew, IEEE JSSC, 2003), which models variation using a physical basis. Specifically, it provides a probability density function (PDF) to model local + global process variation, where the random variables are the physical process parameters of oxide thickness, substrate doping concentration, line edge roughness, and the like. The distribution’s parameters are calibrated by silicon. Because the parameters are physically based, the models do not inadvertently output physically unrealizable device performance values at higher sigmas, unlike some statistical device modeling approaches.
- Solido’s High-Sigma Monte Carlo (HSMC) tool gives the accuracy of billions of Monte Carlo (MC) samples in minutes. It draws billions of Monte Carlo samples in process variation space, but simulates just a subset, by prioritizing the simulations towards tail samples, using adaptive machine learning techniques. Solido HSMC is integrated with and drives commercial SPICE simulators from Cadence, Synopsys, Mentor Graphics and Berkeley Design Automation. It’s fast because it needs just a few thousand simulations, and parallelizes linearly across simulators on multiple cores and machines. It’s as accurate as the SPICE simulations and MOS models that it works off. It can handle arbitrary nonlinear mappings from process variables to outputs; and can handle arbitrarily shaped output distributions. It’s scalable because it works off Monte Carlo sampling, which has accuracy that is fully independent of input dimensionality (dependent only on number of Monte Carlo samples); and because its underling machine-learning technology has excellent scalability. It also provides yield estimates at the system-level. Solido High-Sigma Monte Carlo has been applied to problems with thousands of process variables. Finally, Solido HSMC is easy for designers to trust and adopt, because it feels so much like simply using Monte Carlo sampling.