The latest version of the decade-old automotive design
standard AUTOSAR--version 4.11--is due in the first quarter of
2013 will include support for multicore processors and Ethernet.
The standard has been embraced by many OEMs, but there is some
concern that not everyone views the software-design standard in
the same way. Guido Sandmann, MathWorks
EMEA automotive marketing manager, discusses the evolution of
AUTOSAR and its implication for embedded design in this
Q: Is the AUTOSAR standard presenting a particular
challenge to automotive manufacturers and suppliers?
Sandmann: At MathWorks, we believe AUTOSAR presents
more of an opportunity than a challenge for automotive manufacturers
and suppliers. AUTOSAR standardizes interfaces and formats to allow
the exchange of data consistently between tools used through the
different development phases. Now, automotive engineers need a
consistent workflow across suppliers and other parties to support
consistent data exchange between the phases without losing or
corrupting design information. AUTOSAR with its standardized
methodology and formats in conjunction with Model-Based Design
supports these goals explicitly.
Q: What are the benefits of automatically
generating AUTOSAR-compliant C-code and other AUTOSAR artifacts?
Sandmann: One of the key challenges for automotive
engineers today is to get products to market faster, while retaining
high quality and meeting regulatory requirements. In this situation,
the benefits of automatic code generation are two-fold. First, it
offers automotive engineers added confidence in the quality of their
code by eliminating the error-prone hand coding process. Second, it
allows these engineers more time to focus on design innovation and
verification and validation instead of investing valuable resources
in code creation and documentation.
Embedded Coder’s code generation support for AUTOSAR includes
generation of AUTOSAR component description XML files for software
integration. This further reduces development time because
integration of application software components into Run Time
Environments and target ECUs becomes much easier.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.