The old phrase "give them an inch and they'll take a mile" has some
serious consequences in the design of mobile memory.
So says John Ellis, principal engineer with Synopsys, whose
presentation at DesignCon
2013 later this month promises a number of insights.
[Click here to register for DesignCon 2013,
Jan. 28-31 at the Santa Clara Convention Center. Options range
from an All-Access Pass to Free Expo Admission, which includes
attendance at a dozen tech training sessions.]
Mobile memory is one of the hottest current design topics because so
much memory is now deployed in mobile devices such as smart phones,
tablets and portable game consoles. In that environment, these
memories are being performance-stressed to accommodate the intense
graphics needs of such devices.
But also there's a premium on low
power dissipation and packing density (for portability and size
How do you maintain signal and power integrity in that kind of
environment? Not very easily is the frequent answer.
"The biggest challenge (designers face) is operating in an interface
that doesn't have any far end termination, or if it does, it has
light termination of 240 ohms," Ellis said in an interview. No
far-end termination means reflections and RF interference from
bouncing signals "especially in routed lengths longer than an inch…
through the package of host to package of memory," Ellis added.
This is where the "give-them-an-inch" challenge comes in.
JEDEC memory standards cover the device, not the
channel-qualification specs, he said.
"So the memory interface is often the area that designers look at to
reduce their cost…to make it as inexpensively as possible because
there's no 'standard' they need to meet," Ellis said.
Inch > mile
An inch is considered an acceptable length, but Ellis has seen
memory interface length routed to two inches.
In these examples, "it was outside ... what JEDEC thought people
would use these devices for," Ellis said, adding "the implementer
will often push beyond the original envelope."
This problem is compounded today as designers confront the challenge
of designing to LPDDR3 standards, with data rates of up to 2133
Mbps. Ellis and others who study these problems have the battle
scars from their wok on LPDDR2 to begin to confront some of these
tranmission-line effects. (LPDDR2 up to 1067 Mbps was first mobile
interface that really required those short-routed lengths).
The biggest lesson they learned with LPDDR "was keeping the routed
lengths short," Ellis said. "The idea is to make the length an
electrical link that's hopefully a fraction or the rise time of the
signal hopefully. That minimizes the transmission-line effects and
reduces the need for any far end termination.
Ellis, in his presentation
on Wednesday, Jan. 30, will describe simulation results
to explore the critical signal-integrity effects that impact
performance, and outline the interconnect limitations for the target
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