LONDON – Globalfoundries Inc. has set out a timetable to the high volume production of fully-depleted silicon-on-insulator (FDSOI) chips making the mainstream adoption of the process possible. Globalfoundries (Milpitas, Calif.) had previously signed a memorandum of understanding to manufacture the process with the developer, STMicroelectronics NV (Geneva, Switzerland).
Mike Noonen, executive vice president of worldwide marketing and sales at the foundry chip maker, told an audience at the Common Platform Technology Forum, held at the Santa Clara Convention Center, California, that a physical design kit for the process will be available in the first quarter of 2013. The first "risk production" will come from a Globalfoundries wafer fab in 4Q13 and volume production will ramp during the first half of 2014, Noonen said. The Common Platform Alliance is a grouping of chip makers, led by IBM, Globalfoundries and Samsung that seek to share aspects of manufacturing process development.
FDSOI is a planar CMOS implemented in the ultra-thin region of silicon on top of silicon-on-insulator wafer. This gives potential advantages in terms of the range of voltage operation but, until now, it has been a proprietary process and not part of the mainstream foundry offering.
Noonen stressed the ease of transition to FDSOI from bulk CMOS as well as some of the advantages. "About 80 percent of the front-end of line is the same as 28LP/28SLP. The back-end of line is pretty much identical to the 28LP/28SLP platform. There is IP reuse from bulk," he said, referring to Globalfoundries' bulk planar CMOS manufacturing processes at 28-nm. He added that the ability to use back-biasing of the wafer allows a speed boost for ICs made using the process.
"It's a simpler planar process which offsets the additional cost of the substrates. There are multiples substrate suppliers; Soitec, MEMC and SEH," he added.
Another good match is that both Globalfoundries bulk 28-nm and the 28-nm FDSOI process are "gate-first" processes, although there is some discussion in both bulk and FDSOI as to whether "gate-last" would be a better way to go.
Globalfoundries commits to FDSOI process
What happened to yesterday's headline ?
Gloflo racing towards 14nm FinFet
Is this the backup plan for bulk 14nm/20nm FinFet?
"There are multiples substrate suppliers; Soitec, MEMC and SEH," he added."
Can't make up their minds?
"Another good match is that both Globalfoundries bulk 28-nm and the 28-nm FDSOI process are "gate-first" processes, although there is some discussion in both bulk and FDSOI as to whether "gate-last" would be a better way to go."
Here we go again - I thought one reader already commented on this.
One "real" supplier (Soitec) and the rest on paper
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.