3rd Party IP has become a buzz word since the semiconductor industry shifted to fab-lite and, eventually to, design-lite models over the last few years. These new business models have opened the doors for many companies to overcome some of the internal weaknesses associated with possessing IPs/design competencies to do next-generation ASIC/SoC designs. There have been multiple debates about how, and to what extent, a company should pursue 3rd party IP. This article will outline some of the best practices for using the ecosystem as well as some of the common challenges in integrating and using 3rd party IPs in today’s high-end ASIC/SoCs.
3rd party IP market
The strategy of using the 3rd party IP ecosystem has been very successful when one considers the advantages of licensing the IP from the outside world:
Better time-to-market: Using readily available IP can help kick start the chip design and will ultimately lead to shorter design cycles.
Lower cost: Applying generic foundation IP, like standard cells, general purpose I/O libraries and memory compilers, will often be cheaper when compared to the costs associated with internal IP development, verification and (test-chip) characterization.
Increased focus: Companies can focus their R&D efforts on their differentiating technology, rather than spending their resources on designing IP, which is often standards-based and provides minimal differentiation to the end product.
Reduced risk: IP vendors are likely to be early adopters of newer technologies and typically qualify the IP on their own test chip or in collaboration with a lead customer.
Of course, one can argue that this approach has some disadvantages as well:
Specification compromise: “Off-the-shelf” open-market IP can never be fully optimized for all possible product applications. This provides a major challenge when criteria such as area, performance and features may need to be traded off against aspects like cost, risk and time-to-market. Sometimes an in-between solution, where available IP is customized by the vendor toward the customer-specific application, can make sense.
No ownership of IP: IP licenses come with various restrictions, which can “get in the way.” Examples include: re-use and disclosure and modification rights limitations, which can possibly impair a company’s flexibility if not taken into account well in advance.
Looking at both the pros and cons, it probably makes the most sense for a system company to focus only on the development of IPs in-house, which differentiates a product rather than doing all IP development on its own.For example, for a baseband chip, it’s imperative to do the processor architecture and hardening, RF system, power management blocks, etc., in house. This will enable the company to differentiate their products from their competitors in the market rather than spending effort on generic IPs like USB, MIPI, HDMI interfaces, libraries, GPIOs, etc., which are easily available in the outside world and probably already silicon proven on the IP vendors’ test chip.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.