LONDON – Europe's largest chipmaker STMicroelectronics has been linked to Hindustan Semiconductor Manufacturing Corp. (HSMC) as being part of one of two consortia in discussions with the Indian government over a proposal to set up one or more wafer fabs in India.
The most recent initiative to stimulate the start of Indian chip manufacturing was launched by the Indian government nearly two years ago. One consortium, which includes IBM, Jaypee Group and Tower Semiconductor Ltd., is known to have been involved in the process. The Indian government has reportedly said that two projects are left in the running and STMicroelectronics (Geneva Switzerland) has been linked to HSMC in a report from Indian publication LiveMint referencing sources familiar with the tender process.
A decision from the Indian government was originally expected by the end of 2012 but that was later pushed back to the end of the first quarter of 2013.
HSMC was originally formed in about 2007 with a plan to create two wafer fabs in India. It signed a memorandum of understanding with Infineon Technologies AG (Munich, Germany) to license a 130-nm CMOS digital manufacturing process as well as processes for RF and embedded flash. The plan failed to materialize and HSMC has been mainly quiescent since then.
HSMC has has offices in San Jose, Calif., and Delhi, India. It is led by chairman and CEO Devendra Verma, who has experience as a technology executive and venture capitalist. ST could be a source of manufacturing process technology for a newly-created Indian enterprise. This is an activity it has engaged in with chipmakers in Russia.
HSMC declined to comment on whether it was involved with ST in plans to create an Indian wafer fab. ST declined to comment on whether it was involved with HSMC in such plans.
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