At the press round table, de Geuss said China is coming up fast.
“We are seeing a fairly vibrant electronics economy in China, it is still relatively small compared to the U.S., Taiwan or Korea but I would not underestimate their government which has a lot of understanding of how strategic this industry is,” he said.
“China is one of fastest growing regions in semiconductors and EDA for us,” he added. “We have seen a radical improvement in the complexity of their chips from five or six years ago when they were two or three nodes behind to working today at 28 nm,” he said.
He declined to name any EDA competitors that may be emerging in China, but he did note that with Springsoft, Synopsys acquired in August a strong R&D base close to Taiwan’s foundries.
In his keynote, de Geus called Springsoft “the only [EDA] company higher in customer satisfaction than Synopsys” with a Verdi product that is “a de facto standard in debug.”
Verdi will be “a center of gravity to take all [verification] technology we have and make it available through a single set of windows,” he said. Verification is increasingly key for mobile chips using “so many voltage shifts [that] verification is key to assure functionality when temporarily signals can’t be trusted.”
Separately, Synopsys has shipped more than 450 of the Zebu emulation systems acquired in October with Eve Design Automation, de Geus announced in his keynote. “We will move this to run on GPUs over time” for greater performance, he said.
“I did not say where we were on [this migration], but I wouldn’t have mentioned it if we were not working on it--we have a tight collaboration with Nvidia,” he added in the press roundtable.
De Geus called the rising use of third party intellectual property cores “the single largest driver of productivity going forward.”
Synopsys is the world’s second largest IP core provider, next to ARM. Recently, archrival Cadence announced two acquisitions to bolster its fledgling IP business.
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More chip designers are using more third-party cores, a market watcher says.
I think that the answer is both yes and no. Initially, they are more expensive but provide increased density/speed or lower power. As the technology matures they will trend towards cheaper. I think the greatest challenge to the designers and tool users is and will be addressing the complexity of the design and the verification effort needed. If Synopsys can provide the tools to help with the complexity and verification then they will be successful.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.