The integration of digital and analog/RF
circuits in mixed-signal designs has always caused even the best designs
– and best designers – substrate noise problems. The impact of the
substrate noise relates to the distance between noise aggressor and
victim circuit, the layout of the circuit and the behavior of the
digital circuit (magnitude and spectrum of noise). Advanced process
nodes, originally only adapted in digital designs, are now being used in
mixed-signal products too, putting further pressure on specifications
and yield. Digital blocks are increasing in size hence causing more
noise. Furthermore, designers have to deal with high-frequency effects
of a much steeper di/dt at newer process nodes.
an example, moving from a 180nm to a 65nm technology, analog designers
have seen substrate noise from synchronously switching digital blocks go
up by 18 dB; purely by change of process and without changing
architecture or design.
new product performance requirements put an even higher demand on the
mixed-signal design, just look at the modulation schemes in wireless LAN
Evolution of wireless standard complexity over the last decade. Going
from QPSK to 256 QAM, noise requirements have increased by 27dB (Source:
from 802.11b (QPSK) through 802.11ac (256QAM) significant advancements
in modulation efficiency and data density was demonstrated. However, the
Error Vector Magnitude requirement - a measure for the allowed
deviation of constellation points, from the required position – has
increased significantly: it now needs to be 27 dB better than the
original 802.11b specification.
as 10’s of dBs of noise is being introduced by scaling the process
nodes, new applications and standards require much lower on-chip noise
than previous generations. This cocktail of high-performance
mixed-signal requirements in increasingly noisy environments, is a
cocktail doomed for yield degradation.
for both mixed-signal and digital designs it is possible to use a
systematic optimization methodology to shape the design’s digital power
noise signature, and counteract both dynamic voltage drop and on-chip
noise to recover the lost yield.