Most modern instruments include one or more FPGAs (field programmable gate arrays) in their circuitry. Almost all discrete logic is consolidated there, and increasingly vendors are turning to FPGAs to implement DSP (digital signal processing) functions rather than deploying ASICs (application specific integrated circuits) or dedicated DSP chips.
Module vendors in VXI, PXI, and AXIe often deploy FPGAs to perform the interface function to their respective backplanes, in addition to the specific instrument functions of the module. Since modular systems attain much of their speed advantage by avoiding ASCII communication found in traditional instruments, the FPGA creates a memory map interface that, along with the software driver, defines the automation interface of the instrument. Eliminating the processor found on traditional instruments places the FPGA front and center in defining the operation of the module, but often at hardware speeds.
But there is a trend afoot that may be as disruptive as modular instrumentation itself: Giving users the ability to directly customize the FPGA. While the automated test metaphor since the 1970s has been fixed-definition hardware instruments controlled through flexible programming, this recent trend now allows users to program the hardware definition of the instrument itself. That’s Flexibility with a capital F. Maybe all caps, in fact.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.