LONDON Ė Imperas Ltd. (Thame, England), a pioneer of high-level modeling and virtual prototyping, has released a software model of the ARM Cortex-A7 MPCore. This complement the model of the Cortex-A15, which the company released in 2012.
The model uses Imperas code transformation technology to allow software engineers to execute development code at hundreds of millions of instructions per second. Incorporated within the model is Imperasí range of advanced development tools for efficient software analysis and debug.
The models, together with example platforms, are available from the Open Virtual Platforms website. The models can be utilized within OVP-based components, or integrated into SystemC/TLM-2.0 based virtual platforms using the native TLM-2.0 interface included with each processor model.
"The ARM Cortex processors include capabilities, such as TrustZone and virtualization, that must be modeled accurately to ensure absolutely reliable software execution during the verification process," said Simon Davidmann, CEO of Imperas, in a statement.
Imperas offers models of the ARM7, ARM9, ARM10, ARM11 and Cortex-A, Cortex-R, and Cortex-M families. The models include support for both the 32 and 16-bit instruction sets, as well as the MMU, MPU, TCM, VFP, NEON, TrustZone, virtualization and large physical address extension (LPAE) capabilities, where appropriate for the specific processor.
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