LONDON – Programmable logic pioneer Altera Corp. (San Jose, Calif.) has announced that it will work with Taiwan Semiconductor Manufacturing Co. Ltd. (Hsinchu, Taiwan) to develop programmable devices based on a forthcoming 55-nm EmbFlash process, which supports both logic and non-volatile memory.
Neither Altera nor TSMC indicated how soon the process technology development would be complete or when Altera expected to have products made using the process available. The companies said that programmable devices based on TSMC's 55-nm EmbFlash process would target a wide range of opportunities including automotive and industrial applications.
According to TSMC's website embedded flash processes are in development at 55-nm and 40-nm. The most advanced embedded flash process listed as available from TSMC is 90-nm. Compared to prior generation embedded flash, TSMC's 55-nm EmbFlash 10 times the gate density and shrinks flash and SRAM cell sizes by 70 percent and 80 percent respectively.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.