Design Con 2015
Breaking News
Design How-To

Samsung hits triple-level-cell NAND flash milestone

Floating gate technology.
5/1/2013 05:32 PM EDT
12 comments
NO RATINGS
< Previous Page 2 / 3 Next >
More Related Links
View Comments: Newest First | Oldest First | Threaded View
<<   <   Page 2 / 2
AD2010
User Rank
Blogger
re: Samsung hits triple-level-cell NAND flash milestone
AD2010   5/2/2013 1:57:16 PM
NO RATINGS
There are so many definitions for efficiency, so cannot comment on your number of 70% In any case, there is a strong possibility that the next 1X generation will be conventional floating gate with wrap around IPD and only after that 3D NAND will come.

resistion
User Rank
CEO
re: Samsung hits triple-level-cell NAND flash milestone
resistion   5/2/2013 12:42:32 PM
NO RATINGS
75% area efficiency for 64 Gb at ~20 nm. Makes me think 3D NAND area efficiency degrades even further?

<<   <   Page 2 / 2
Flash Poll
Like Us on Facebook

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)
EE Times on Twitter
EE Times Twitter Feed
Top Comments of the Week