LONDON – Multicore debug tool developer Ultrasoc Technologies Ltd. is working with PMC-Sierra Inc. to incorporate debug IP into PMC's next-generation of storage controller ICs, effectively marking the debut of a system that can work across multiple processor architectures.
Ultrasoc (Cambridge, England), founded in 2005 as a spin-out from the Universities of Kent and Essex in England, has used its research into multicore computation to develop a heterogeneous multicore debug system called UltraDebug that is based on message passing. PMC-Sierra (Sunnyvale, Calif.) is fabless chip company that sells processors for storage, optical networking and mobile applications.
"The nearest thing to what we do is Coresight on-chip debug from ARM but, of course, processor IP providers are only interested in supporting their own cores," said Karl Heeks, CEO of Ultrasoc. "We provide universal debug for IP from any vendor." Heeks added that UltraDebug is intended to support heterogeneous multicore applications including mixed CPU, GPU and hardware accelerator systems. "We are supplying MIPS support for PMC-Sierra. We are building up libraries of support [for different processor architectures] as we go forward," said Heeks.
Heeks said UltraDebug is also agnostic to on-chip interconnect fabrics, such as those provided by ARM, Sonics or Arteris. UltraDebug is modular with three essential pieces of circuitry for any chip; the message engine that manages the debug message passing protocol, cores that sit adjacent to the processor cores and a separate core adjacent to the USB interface that manages the passing of information and control to and from the development environment.
"Our business model is to take up-front fees and maintenance and support contracts and per-chip royalties for the on-chip IP," said Heeks.
Heeks said there is a need for heterogeneous multicore debug. At present debug systems tend to be architecture-specific requiring multiple systems that still miss interactions between cores. "The industry has recognized it would be beneficial to have core-agnostic debug IP. This allows SOC developers to swap processor cores in and out of their designs to find the optimized performance. Heeks said that Ultrasoc has already received encouragement to join the Heterogeneous Systems Alliance Foundation.
The development program with PMC-Sierra includes work on Ultrasoc's library of debug IP which provides system-level capability for multiple heterogeneous processor cores, including graphics cores and custom accelerators. As well as detecting software and hardware bugs the system-level view supports optimization of memory interfaces and system fabrics. UltraDebug is expected to first appear on silicon later in 2013 at an advanced process node.
Karl Heeks, CEO of Ultrasoc Technologies.
Heeks said: "As future generations of complex SoC’s deliver ever more sophisticated electronic products it will be necessary to integrate increasing amounts of heterogeneous multicore processors. In order to effectively debug these systems it will be hugely beneficial to have a flexible and scalable solution provided by an independent company as an alternative to current in-house solutions or existing debug technologies that are linked to a single architecture."
Salman Ghufran, vice president of product development for PMC's enterprise storage division, said: "PMC partnered with Ultrasoc because we recognized that their unique monitoring and debug infrastructure would give us the needed visibility to both enhance our device operation and accelerate our time to market for our customers."
Ultrasoc is backed by Octopus Investments Ltd., a U.K. based investment management firm
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