Editor’s note: In part 1 of this two part article, the author reviewed recent advances in electrode fabrication for phase-change memory with a particular focus on the benefits of annular electrodes. Part 2 concentrates on the possible advantages and limitations offered by nanotechnology and self-assembly techniques.
Recently, researchers from the Korea Advanced Institute of Science and Technology (KAIST) disclosed details of a new approach to reducing reset current using of self-assembly (S-A) . The method offers a means of obtaining sub-lithographic resolution of the electrode structure of a PCM device. It involves depositing a number of self-assembling circular oxide islands, or disks, on the surface of the chalcogenide active material and then depositing one of the electrodes on and between the islands. The researchers constructed devices with contact apertures 500 nm × 500 nm and fill factors (the area of the electrode covered) of 50%; they also simulated PCM structures with 2 µm × 2 µm and 20 nm × 20 nm apertures . The experimental devices and simulations indicated the reset currents, and the current densities for the electrode body Jb at levels much reduced from those seen at similar lithographic dimensions without benefit of self-assembly (S-A) techniques.
The disks of the self-assembled structure have a hemispherical form with a flat surface at the interface (see figure 8). The structure is inverted with respect to most of the more usual PCM cell structures. The figure shows
Figure 8: Essential structural elements of a self-assembled PCM structure with initiating hotspot, shown for reference time at which the initiating molten hot spot (IMS) forms.
Recall from figure 2
in part 1
that the current density as a function of electrode diameter for a solid electrode remains quasi-constant for electrode diameters beyond 50 nm. All the experimental devices in the current work were operating in the flat part of the J
) electrical characteristics. Some of the gains reported are governed by the relationship
Jb = Jc(ac/Ab) 
is the contact current density at the electrode-active material interface, ac is the area of contact between the amorphous material and the bottom electrode at the annulus, and Ab
is the area of the body of the bottom electrode. Even so, current density values less than 1 × 107
Commercial success in the use of S-A techniques to achieve sub-20-nm lithographic resolutions in PCM device structures will require its application at lithographic nodes lower than 20 nm. What then will be required from the S-A technology at the 20-nm node and what might be limiting factors?
Consider the relationship of the number of oxide disks required as a function of the disk diameter for changing fill factor (see figure 9). For a 20-nm × 20-nm aperture and an fill factor of approximately 50%, the method would require about 10 disks of 5 nm diameter. The larger the number of disks, the more tolerant the fabrication process would be to small variations. The maximum coverage for square packing in a square aperture, i.e disks touching, is about 78%. There are clearly a number of different packing arrangements, for example square, hexagonal, and random. The curves for figure 9 were based on square packing; other packing arrangements will require small adjustments to the position of the curves.
Click image to enlarge.
Figure 9: For a 20-nm x 20-nm aperture and an fill factor of approximately 50%, the self-assembling method would require about 10 disks of 5 nm diameter. The four lower curves are for a 20-nm × 20-nm square aperture for fill factors of 25%, 50% , 66%, and 75%, while the upper curve is for a 50-nm × 50-nm aperture with a 25% fill factor; other packing arrangements result in a similar number of disks.
These results raise the first possible limiting question: What is the minimum size surface disk is it possible to form using the S-A technique? Reference 8 provides examples of disks of the order 20 nm with the smallest disks estimated by this writer from the published micrographs as approximately 15 nm.