LONDON – SanDisk Corp. (Milpitas, Calif.), a leading supplier of data storage products, has announced it has begun providing samples of flash memory products based on its 1Y-nm process technology and that the 1Y generation is a 19-nm process, the same minimum geometry as the 1X generation.
The announcement is surprising because flash memory has previously been forecast to have three nodes at between 19-nm and 10-nm starting at 1X and going to 1Z. If the progress followed Moore's Law of diminishing minimum geometries to provide denser 2-D memory arrays it would give 1Y node at about 15-nm followed by a smallest possible flash memory at about 11- or 10-nm.
It represents the minimum sized flash memory because very few electrons are involved in the charge storage and variability would widen the distribution of transistor threshold voltages. Therefore at about that time flash memory vendors are expected to jump back to 40-nm minimum geometry and produce 3-D NAND flash memory with as 16, 32 or 64 transistors arranged vertically.
The 1X, 19-nm flash memory production was more than 50 percent of SanDisk's output in 4Q12 and the transition to the 1Y node was expected to come in 3Q13.
One possibility is that SanDisk has chosen to stay at 19-nm to avoid the need to go to quadruple patterning of immersion optical lithography which would have a significant impact on the cost of production of NAND flash memory.
SanDisk has now revealed that 1Y – now described as a generation rather than a node - is the company's second generation at 19-nm. What the company does claim to have achieved is a reduction in the memory cell size from 19-nm by 26-nm to 19-nm by 19.5-nm, delivering a 25 percent reduction of the memory cell area.
The 1Y memories use SanDisk's All-Bit-Line (ABL) architecture, three-bit per cell technology and proprietary programming algorithms. SanDisk did not indicate how that reduction to very close to 4F^2 cell size area was achieved nor what level of endurance cycling is achievable.
The 1Y generation memories are suitable for use in mobile phones, tablet computers and solid-state drives, SanDisk said.
Toshiba Corp., SanDisk's partner in flash memory production and co-investor in manufacturing joint venture Flash Forward Ltd., said that it would be using a second-generation 19-nm process to develop the world's smallest two-bit-per-cell 64-Gbit NAND memory chips, with an area of only 94 square millimeters. Toshiba added that it is also developing 3-bit-per-cell chips by using this process technology and aims to start mass production in the second quarter of this fiscal year, which is 3Q13. Toshiba made no reference to 1Y.
And this last 1Z generation is not even double the density of the prior one 1Y. If it's going to be the final generation, at least make it look like one last hurrah or going out with a bang, like 10-13 nm, and get more of your money's worth.
So finally, a company is giving up shrinking. Intrinsic variability at small nodes is a well know problem, and the complications in litho does not help. The return back to 40 nm to get 3D devices is certainly a milestone.
Join our online Radio Show on Friday 11th July starting at 2:00pm Eastern, when EETimes editor of all things fun and interesting, Max Maxfield, and embedded systems expert, Jack Ganssle, will debate as to just what is, and is not, and embedded system.