Modeling of VPX (VITA 46) backplane in Integrated Modular Avionics systems (IMA) for performance analysis is very important for the integrity of the design of modern complex avionics systems. Our recent work is based on the Integrated Modular Avionics (IMA) bus processing system, where the performance of VPX backplane plays a very important role in achieving real-time response. The concept was to build a functional model of the complete avionics system and analyze the performance of VPX backplane. The avionics cabinet hosts the modular cards for processor, graphics, IO, and protocol processing. The IMA system is being used to capture flight data, process the incoming values, and transform the model results into decisions that are fed to other sub-systems and instrument panels.
VPX or VITA 46 is an ANCI standard that provides VME bus based system with support for switched fabrics over a new high speed connector. The new generation of embedded computing platforms based on the VPX standard reflects the growing significance of high speed serial switched fabric interconnects such as PCI express, Rapid IO 10 gigabit Ethernet. These technologies are replacing the traditional parallel communications bus architecture for local communications because of significantly greater capability. Switched fabrics technology supports the implementation of multiprocessing systems that requires the fastest possible communication between multiple processors.
Need for VPX backplane performance analysis
The importance of VPX backplane performance analysis is very important when multiple cords or boards are transferring large volume of data across the VPX backbone. For example, if the data coming from the IO cord exceeds certain thresholds, there will be data loss that can result in incorrect action in downstream systems for a particular time frame. As the error may occur later in time, it might be harder to identify and dynamically adopt rectification techniques. To identify such scenarios, we really need a software methodology which can model the behavior and functionality of VPX backplane and allows users to validate the system performance with a set of transaction sources. Using this approach, we can make sure that the VPX backplane and the processing systems in the IMA architecture can handle a range of data rates without timing errors.
System level design and methodology
After a review of a number of mechanisms including building prototypes, we decided on incorporating a formal system level modeling and simulation approach to product development. One of its major advantages is the ability to rapidly converge to a design specification which meets a diverse set of interdependent requirements. This system-level design can be done in parallel with the development of the written specification and long before an implementation of that product has been scheduled.
It is well known that modern complex systems typically contain limited processing power, finite memory allocation, limited battery power and presence of complex communication protocols. In such scenarios, there will be lot of interdependencies which makes system performance unpredictable. Simulation based system level design is one such approach which obtains the results in the context of interdependencies. Other approaches could be the use of analytical tools such as spreadsheets and formal scheduling techniques. Users can also address the power, performance and reliability of the system using simulation based system level design approach. It is easier to address the most critical parts of the systems like the VPX backplane to analyze the performance matrices.
The methodology used for the development of IMA based system is as below;
- Develop the block diagram of the system and the environment out of re-usable modeling components.
- Run simulations to explore design space and architecture.
- Analyze the results using graphical reports and automated reports.
- Make conclusions based on the analysis reports.