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Dual core architectures in automotive SoCs

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GalPeti
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re: Dual core architectures in automotive SoCs
GalPeti   12/13/2010 8:56:07 AM
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What about DPM and AUTOSAR? Can you have AUTOSAR ( BSW + some SWC-s ) on one core and some other code on the other core ? Does a project like this exist today ?

cbbear
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re: Dual core architectures in automotive SoCs
cbbear   9/9/2010 1:44:16 PM
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Note that the SoCs depicted here are targeted mainly at gateway and safety automotive. Powertrain SoCs from Freescale already have assimetrical multiprocessing in the form of coprocessors like TPU in the MPC5XX family and the eTPU in the MPC55XX/56XX families. Quite different approach, but targeting the same goals: offloading main core, reduced latency, power consumption while keeping flexibility. http://www.freescale.com/etpu

Deepak.Baranwal_#1
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re: Dual core architectures in automotive SoCs
Deepak.Baranwal_#1   8/25/2010 5:18:24 AM
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Good article summarising the dual core operation. I have a doubt over the performance of this architecture as both cores here share the same system Flash and SRAM. It is going to introduce unnecessary bottlenecks resulting in not so independent operations of both cores. Please provide some details here. With Thanks, Deepak

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