SOUTH PORTLAND, MAINE Fairchild Semiconductor International's Interface and Logic Group and its Analog and Mixed Signal Products Group are offering a double-data-rate dual-in-line memory module support solution for 184-pin, 2.5-volt, 72-bit-wide PC200 and PC266 registered DDR synchronous DRAM memory modules.
The solution comprises three chips that together are said to help designers meet subtle timing requirements in memory subsystems for servers and workstations. The chips are the FMS7857 phase-locked loop clock driver, SSTV16857 registered buffer and FM34W02 serial-presence-detect E2PROM.
The FMS7857 is a zero-delay clock buffer used to synchronize signals to each memory chip. It operates over a frequency range of 95 to 170 MHz and features 2.5-volt Vdd, as well as low skew and jitter.
The SSTV16857 is a 14-bit register used for address and control buffering. It features SSTL-2-compatible input/output structures, 2.5-V Vdd and differential SSTL-2 compatible clock inputs.
The FM34W02 is a 2-kbit, two-wire bus interface E2PROM that supports serial-presence-detection circuitry in memory modules. The chip allows the CPU to determine the capacity and the electrical characteristics of the memory devices it contains.
The FMS7857 and SSTV16857 are each packaged in a 48-pin thin shrink small-outline package and are priced at $4 and $4.25, respectively, in 1,000-piece quantities. The FM34W02, available in eight-pin TSSOPs and small-outline IC packages, is priced at 80 cents each in 1,000-piece quantities.
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EETInfo No. 605