The AE57C is the first product from Renesas Technology Corp.'s AE-5 Series of 32-bit smart card microcontrollers. According to the company it offers approximately four times the processing performance of the AE-4 Series as it executes one instruction per cycle instead of one instruction in two cycles. The chip comes with 132 KB of EEPROM, the largest memory capacity of any of the company's smart card microcontrollers. It also features 320 KB of mask ROM and supports AES (Advanced Encryption Standard) encryption processing.
The device is said to be suitable for multi-function, large capacity smart cards such as USIM (Universal Subscriber Identity Module) cards for 3G mobile phones. A USIM card stores user information, and when installed in a mobile phone allows calls to be made based on the card-owner's information.
The AE57C uses the AE-5 CPU core, which has a 32-bit arithmetic-logic unit (ALU) and internal bus width. The core is upward-compatible with the AE-4 16-bit CPU, enabling AE-4 Series programs to be used It also features new instructions and addressing modes. ROM code efficiency has been improved by approximately 20 percent compared with the AE-4, enabling programs to be made more compact.
The device uses Renesas Technology's MONOS (Metal Oxide Nitride Oxide Silicon) EEPROM. The mask ROM allows the storage of a large, general-purpose OS to perform complex processing as well as the storage of application programs and data that do not require re-writing.
In addition to the peripheral functions of the AE-4 Series, the device features a Bytecode Extension Module (BEM). This is a function for fetching bytecode and executing conversion to user-defined execution addresses, enabling processing by a Java Card or MULTOS, for example, to be made simpler and faster. The device also offers a DMAC (Direct Memory Access Controller) that supports high-speed communications, reducing the load on the CPU, an AES coprocessor that executes encryption processing, and two I/O ports incorporating a UART for full-duplex communications. The on-chip exponential multiplication/division algorithm coprocessor has been extended to 2112 bit capability.
The E6000H full emulator and SE-I simple emulator are available as development tools. The AE57C can be shipped in wafer or COT (Chip On Tape) form. Sample shipments will begin in February 2004.