Tempe, Ariz. --- Motorola Inc. has unveiled a hybrid processor architecture that combines the features of conventional microcontroller units and digital signal processors into single-chip devices that could serve as the brains for the auto industry's next-generation by-wire products.
The 56F8300 hybrid controller series was designed from scratch to fill a void for automakers and tier-one suppliers struggling to create a computing foundation for vehicles that use electric motors, rather than hydraulic actuators, to control steering, braking and suspension functions.
Motorola engineers said such future systems need a more powerful platform than conventional standalone MCUs and DSPs because the control of electric motors is far more compute-intensive than the control of hydraulics.
"By-wire will require more computational power than is now offered by 16-bit controllers; in many cases, it will tax the capabilities of 32-bit controllers," said Scott Lynch, operations manager for Motorola's DSP Operation (Tempe, Ariz.). "The real-time decision-making requires a lot of sophisticated, DSP-type algorithms."
By-wire applications rely on electric motors to actuate a vehicle's brakes, steering, throttle or suspension. Automakers expect the technology to enable them to eliminate the mechanical linkages that now connect brake pedals to brakes, for example, or steering wheels to front wheels. Instead of mechanical linkages, by-wire systems will employ wires to deliver electronic messages directly to the brakes or steering gear. To make such systems work, however, automotive engineers said that they both need DSP capabilities (to handle the intense processing algorithms) and conventional MCUs (to handle interfaces, networking and control).
Motorola's 56F8300 line of devices is a candidate for such applications because it provides an optimal mix of DSP and MCU instructions, the company said. The mix was decided on after Motorola reviewed a study showing which DSP and MCU instructions were used most frequently, company executives said. Designers streamlined the architecture to combine the essentials of both technologies.
"It's a difficult task to balance the instruction set so that you can do both," Lynch said. "This is the only product we're aware of that has been designed from the ground up for both functions." He said that while other ICs have combined such capabilities they were not designed from scratch as both an MCU and DSP. Rather, he said, such products have added one or the other capability to an existing architecture.
The 56F8300 is said to execute code from flash memory at one of the industry's fastest rates-up to 60 million instructions per second. Unlike conventional MCUs, its so-called Harvard architecture, common to DSPs, allows for one multiply-accumulate operation per processor cycle.
The six initial family members available now vary by the amount of on-chip flash memory, ranging from 32 kbytes to 256 kbytes. Additional members will be introduced in 2004.
Motorola engineers said they expect the devices to find initial use in automotive valve control, adaptive air bags and electric power-assisted steering, as well as prototype automotive systems and eventually by-wire applications. By-wire applications aren't expected to hit the street in production models until late this decade.
The devices, ranging in price from $8 to about $16 depending on flash memory, will also be available on demonstration boards from Motorola's Metrowerks subsidiary.
This story was originally published at EETimes.com