Toshiba America Electronic Components, Inc. announced that its parent Toshiba Corporation (Toshiba) has developed a Multi-Chip Package (MCP) of 1.4mm thickness that can stack 9 layers (6 memory chips with 3 spacers).
Toshiba has utilized advanced process and mounting technology to shrink each memory chip to 70 micron (¼m) thickness, the thinnest in the world for MCP applications, and then bond the chips together in one package by wires. The miniature MCP consists of a combination of memory chips, such as SRAM, SDRAM, NOR Flash memory and NAND Flash memory, and has a total capacity of 776 megabits (Mb) in one sample application.
The chip combination available in this MCP is flexible to accommodate the performance requirements of the customer and to create the most effective package. Toshiba plans to launch new MCP products in May 2004.
By using the latest process technology, Toshiba was able to develop chips that are approximately 15¼m thinner than Toshiba's current design (85¼m). As a result of this and improved mounting technology, the MCP can stack 9 layers with 6 memory chips and then wire-bond the layers together for total 1.4mm thickness. Overall thickness of the MCP remains the same as the current size of 1.4mm, thanks to the improvement in process technology, even though the number of layers has increased from 6 to 9.
Also, in order to optimize data transfer between the CPU and MCP, Toshiba has adapted a "triple-data bus system" which consists of a high speed bus (for SDRAM and NOR), a middle speed bus (for SRAM and NOR) and NAND bus.
"The addition of the triple data bus in a nine-layer MCP further demonstrates Toshiba's advanced packaging leadership and enables us to optimize overall performance of the memory subsystem, while giving our customers the flexibility to choose the type and density of memory they need to meet the requirements of today's and tomorrow's advanced multimedia-equipped cellular phones," said Scott Beekman, business development manager, communication memory products, for TAEC.
The small and thin MCP with dimensions of 11mm (W) x 14mm (D) x 1.4mm (H) will enable digital mobile equipment, such as mobile phones with cameras, to carry larger memory capacity with high density. It will also provide customers with high-speed-data-programming and low power consumption when the most suitable combination of memory chips is chosen for the customer's application. The start of sales in May 2004 is expected to solidify Toshiba's leadership in MCP technology, which is fast becoming the device of choice for mobile phones with advanced functions such as camera and for other personal digital equipment.
MCP Specifications (Sample)
1. Chip Combination: 6 memory chips and 3 spacers (Total 9 layers)
2. Chip Type: SRAM (8Mb x 1), SDRAM (128Mb x 1), NOR Flash Memory (128Mb x 3), NAND Flash Memory (256Mb x 1)
3. Package Size: 11mm(W) x 14mm(D) x 1.4mm(H)
4. Power Supply: 1.8V
5. Ball Pitch: 0.65mm
6. Ball Counts: 225 balls
7. Bus Lines: Triple Data Bus System
* The sample shown above is a typical combination of chips and can also include Pseudo SRAM if necessary.