Altera Corporation announced the immediate availability of 32-bit, 33-MHz PCI IP cores supporting Altera's low-cost MAX II device family. Customers can save as much as 50 percent by implementing PCI-based control path applications in MAX II devices, compared to the cost of fixed-function PCI ASSPs, which contain functionality unnecessary for control path applications.
Altera's MAX II CPLD family employs an easy-to-use look-up table (LUT) logic structure that enables higher-density designs at less than half the cost of the previous-generation MAX CPLD family. Due to the higher densities offered in the MAX II architecture, the EPM1270 and EPM2210 devices have ample capacity to support the implementation of PCI-based control path logic. For example, a 32-bit, 33-MHz PCI target function can be implemented in approximately 40 percent of the EPM1270"the smaller of these two devices" leaving more than half of the device available for the integration of additional logic.
"We have been using CPLDs and FPGAs for several years across a wide variety of applications, and the new low-cost, high-density MAX II devices, combined with Altera's PCI cores, allow us to expand the CPLD application space," said Mike Hermann, vice president of engineering operations at Nuvation. "We will be able to use this powerful combination for complex interface bridging functions, which would have previously required the use of an ASSP."
PCI, originally an interface standard for PC add-on cards, is today used in a wide variety of PC and non-PC interfacing and bridging applications, both between and within systems. A low-cost, programmable, PCI-compliant device with the density to handle bridging and interface functions will help designers reduce system costs since they can be implemented for half the cost of ASSP-based designs, while also offering increased flexibility to customize their designs.
In addition, the MAX II architecture contains features that further reduce the cost of implementing control path applications. The integrated low-frequency oscillator, the on-chip voltage regulator, and the user flash memory"an industry first"all contribute to reducing the cost and board space required for control path applications in digital electronic systems.
"With these IP cores, the MAX II family will take CPLD design into new territory," said Justin Cowling, Altera's director of marketing for Altera's IP business unit. "Designers will be able to leverage the easy-to-use tools and expertise developed with the first-generation MAX devices, while using MAX II devices to implement functions, such as PCI interfaces and bridges, which historically were beyond CPLD functionality. This ability to use off-the-shelf PCI IP in a CPLD-based design is a testament to the power of the MAX II family."
Pricing and Availability
The MAX II PCI IP cores are available now for download and evaluation through Altera's IP MegaStore web site located at www.altera.com/IPmegastore . For a limited time only, a perpetual license for the PCI/T32 target-only IP core is priced at $1,995, a $3,000 reduction off the standard list price. The PCI/MT32 master/target core is priced at $8,995. Both cores include 12 months of upgrades and support.
About the MAX II Device Family
Altera's new MAX II device family is a non-volatile, instant-on, low-cost programmable logic device family. Harnessing the advantage of a look-up table (LUT) architecture, the MAX II device family breaks through the cost and power limitations of traditional macrocell-based architectures. MAX II devices are optimized for cost-per-I/O pin and targeted for any general-purpose, low-density logic application. In addition, this new device family offers 90 percent lower operating power and four times the density of previous-generation CPLDs, enabling designers to use CPLDs as replacements for low-density FPGAs, ASSPs, and standard logic devices.