San Jose, Calif. IPAC-Twin Advance (IPAC-TA) has added advanced screen-printing technology for solder bumping and thin-film applications in the production of its wafer-level chip-scale packaging (WLCSP).
Using patented technology from Advanced Interconnect Solutions, the AIS technology allows processing with precision suitable for signal re-routing, polyimide printing, and fine-pitch bumping, which eliminates the need to use wafer-fab type processes such as sputtering of under-bump metallurgy or electroplating of solder for bumping.
The AIS process provides a dimensional tolerance of ±10 microns, producing patterns of 0.10-mm (4 mils) pitch using widths and diameters as small as 0.05 mm (2 mils).
The technology also provides thickness control, allowing multi-layer printing of metal paste and polyimide with 0.03-mm clearance between patterns. With this flexibility and precision, the technology can be used to fabricate CSPs for most applications, including RF, analog, mixed signal and high-speed memory devices.
Advanced screen printing
(Click on Image to Enlarge)
The new printing technology features real-time paste-volume control and a pressurized print chamber combined with a patented single camera vision system and robotic wafer handling. These technological advances enable screen printing to be used in high-precision semiconductor applications, said the company.
The company also noted that the same equipment can be used to deposit the polymer coating used for layer insulation and solder bump reinforcement in its no-underfill TCSP packaging.
IPAC-Twin Advance is a joint venture between IPAC of Silicon Valley and Twin Advance of Malaysia. The company combines IC packaging and SMT technologies for advance system-in-package applications.
Call (408) 321-3600