Milpitas, Calif. A serial ATA (SATA) core that was recently added to LSI Logic Corp.'s CoreWare IP portfolio offers designers a storage interface that can easily be integrated into cell-based ASIC or RapidChip Platform ASIC designs.
The SATA core is compliant with specifications set by the SATA International Organization, or SATA-IO.
SATA is a point-to-point, high-speed serial link replacement for the 40/44-pin parallel ATA of mass storage devices.
The SATA core can be configured to meet device or host side system requirements. Its modular design includes the physical layer (PHY), link and transport layers with a data buffer manager interface that interacts with the application layer.
The PHY in the SATA core is a high-speed differential layer that uses LSI Logic's GigaBlaze serializer/deserializer (SerDes) technology. By leveraging the GigaBlaze SerDes core, the SATA core can support 1.5-Gbits/s and 3-Gbits/s operations. It also allows custom frame/FIS generation and reception.
The SATA core will enable designers to handle the SATA protocol and control the data transfers between an application layer, such as DMA or parallel ATA, and a high-speed serial transceiver.
According to Jack Leib, product manager for the SATA core, one unique feature LSI Logic is able to offer is the ability for the customer to create two custom frame information structures (FIS).
"For example, if the customer wants to create some sort of hierarchy of serial ATA drives, and he may want a FIS that does routing, a custom FIS can be invented such that it guides the serial ATA packet through a switch," he said.
He also cited two different ways to interface with the core, the task file interface and a simple DMA request/acknowledge interface.
The task file interface is what's needed to be compatible with the way things used to be with the older IDE drives, he said. "This is a legacy mode interface. It's for the PC," Leib said.
The DMA interface is a very simple one that operates in a request/acknowledge mode. The host that's sitting above the SATA core will request access back to the core, which will then send back a signal that it's acknowledged. Then there's the simple DMA operation of the data. "The data that will become the FIS will go into the buffer in the core," he said.
LSI Logic cited several markets that can realize shorter product development time by designing with the SATA core. They include storage systems, consumer and office automation applications.
LSI Logic Corp., 1-866-574-5741, www.lsilogic.com