SAN FRANCISCO LSI Logic Corp. added a pair of new slices to its RapidChip Integrator2 platform ASIC family Tuesday (May 24) that the company says provide high-volume ASIC and FPGA designers with a way to eliminate many design and development costs, including those associated with photomasks.
LSI Logic (Milpitas, Calif.) said it would not charge customers for photomasks, though nonrecurring engineering charges of less than $50,000 would apply. With volume pricing of $6 per part on orders of 100,000 or more, the new slices provide a low-cost, low-risk option for high-volume applications, according to the company.
Using an accelerated design flow and mature, 180-nm technology allows LSI Logic to offer the new slices at the lowest possible cost, the company said. An evaluation version of the LSI Logic RapidWorx tool kit and the Amplify RapidChip physical synthesis tool, jointly developed with Synplicity, are being provided to designers at no additional fee.
LSI Logic said the new RapidChip Integrator2 slices provide an alternative for FPGAs used in the consumer and industrial markets. The slices contain more gates and memories in a plastic quad flat pack than reprogrammable architectures and are ideal for designers developing products that depend on inexpensive volume solutions, the company said.
In a statement released Tuesday by LSI Logic, Rich Wawrzyniak, senior analyst at Semico Research, said the new RapidChip offering is a significant benefit to designers seeking to gain traction in emerging markets. "By eliminating mask tooling charges for entry level Platform ASIC solutions, LSI Logic is providing its RapidChip customers with the ability to quickly introduce innovative designs in high potential growth markets while meeting their cost and performance targets," he said.