SAN FRANCISCO Verification tool provider VeriEZ Solutions Inc. will offer SystemVerilog support for its EZVerify product, beginning in the fourth quarter with beta customers.
EZVerify now provides static analysis and automatic knowledge extraction for OpenVera and SystemVerilog-based verification flows. VeriEZ said the SystemVerilog extension enables customers to reuse existing OpenVera modules with new SystemVerilog development.
"We believe our valued customers would like to use our tools in a SystemVerilog environment, and we have made it possible with our current offering," said Sashi Obilisetty, VeriEZ president and CEO, in a statement.
VeriEZ (Santa Clara, Calif.) said EZVerify supports the verification constructs included in the ratified Accellera SystemVerilog standard, popularly known as the SystemVerilog 3.1a, and the emerging IEEE standard (P1800).
SystemVerilog functionality can be purchased as an option by existing EZVerify customers. The list price for a one-year, single-language license starts at $20,000.