With more that 1,500 designs and millions of shipped devices to their credit, ChipX are well known for their Structured ASIC offerings.
In particular, ChipX specialize in the concept of a “SideChip,” which they define as a Structured ASIC that resides next to a main ASIC and provides integration relief and flexibility to a system architecture. This concept is of particular interest for the growing number of systems in which standards and protocols are changing and evolving, and also in fragmented markets. In cases such as these, designers need the ability to expand the capabilities of the system without re-spinning the main system chip or building a new chip for each individual market. By mounting additional capabilities on a ChipX SideChip, designers can meet changing market requirements and extend the life of an existing system with minimal effort.
Now, ChipX have announced the the latest addition to the company’s growing portfolio of Structured ASICs with embedded IP: the CX6100 family. Fabricated in a high performance, eight-metal 0.13 um process, CX6100 devices accelerate time-to-market and eliminate many of the risks associated with traditional standard cell ASIC development by integrating a silicon-proven PCI Express (PCIe) PHY core. At the same time, the new product family offers designers a significantly higher performance, lower power alternative to FPGA-based solutions.
The twelve devices in the new CX6100 structured ASIC family support a wide range of applications in computing, storage, instrumentation and networking. The embedded PCIe PHY is compliant with the current 1.1 version of the specification and is available in 1, 4, and 8 lane options. Along with the embedded PHY, ChipX is offering an optional PCIe-compliant controller. The PHY offers complete PIPE interoperability for customers wishing to use their own PCIe controller.
With the optional PCIe 1.0a compliant controller, designers can quickly develop root port, bridge and endpoint designs. The controller supports 1, 4 or 8 lanes, up to 8 VCs and up to 6 BARs. It features configurable retry buffers and support for up to 4 KB payload sizes. The controller is supplied complete with simulation models, driver software examples and all documentation.
More information is available at www.ChipX.com.