AUSTIN, TX Silicon Laboratories Inc. announced the Si5040, the latest addition to the company's family of high-speed physical layer products. The Si5040 leverages Silicon Laboratories' proven DSPLL technology to create the industry's first 10 Gbits/s XFP transceiver IC with integrated jitter attenuating capability on both transmit and receive data paths.
With a package size of only 5 x 5 mm, the Si5040 is the industry's smallest solution offering low power and low jitter for space-constrained XFP applications. Additionally, the Si5040 is the only transceiver to support continuous operation with jitter attenuation across all telecom and datacom protocols between 9.9 and 11.4 Gbits/s, including OC-192/STM-64, 10 GbE, 10G Fiber Channel and their corresponding forward error correction (FEC) data rates.
Achieving best-in-class jitter performance, the Si5040 uses Silicon Laboratories’ patented DSPLL technology to reduce jitter on 10 Gbits/s serial data streams that have been degraded by system level noise sources on either the network side or the port card. This revolutionary new transceiver architecture provides industry-leading transmit jitter generation of 2.5 mUI RMS while eliminating the need for external jitter clean up circuitry inside the module or on the port card. Applying DSPLL technology in the receive path minimizes receive data jitter to ensure error-free operation with port card ASICs or FPGAs.
The Si5040 uses an innovative receiver circuit that automatically adjusts data recovery parameters to optimize bit-error-rate (BER) performance ensuring robust operation in unpredictable multi-vendor network environments over a wide range of channel conditions.
Receiver performance is optimized by using an internal signal quality monitor to drive real-time adjustment of the decision threshold so that BER performance and jitter tolerance is maximized. The Si5040 also supports manual adjustment of the receiver decision threshold and sampling phase for custom BER optimization algorithms. Regardless of receiver operating mode, the superior input sensitivity (5 mV pk-pk differential typical) of the Si5040 makes it idea for both short and long reach applications.
"The Si5040 continues to deliver on Silicon Laboratories' commitment to providing innovative solutions to the networking industry by leveraging our industry leading DSPLL technology," said Dave Bresemann, vice president of Silicon Laboratories. "By combining jitter attenuation capability together with a sophisticated receiver architecture, we are greatly simplifying the task of achieving true SONET/SDH performance in XFP module applications."
The Si5040 XFP transceiver offers the industry's most complete feature set including support for three types of analog and digital signal quality monitors including analog loss-of-signal (LOS) detection, consecutive identical digit (CID) detection and a proprietary digital measure of receive data eye opening. The Si5040 also simplifies system level test and debug by offering line loop-back, XFI loop-back and PRBS pattern generation and checking on both transmit and receive data paths.
Complete device configuration and status monitoring is available through a serial microcontroller interface supporting commonly used protocols such as I2C.
To support the industry’s need for low power solutions, the Si5040 consumes less than 575 mW typical. The Si5040 further simplifies power management by operating over a wide power supply variation from +5 to -10 percent and provides additional power savings through programmable signal swings on all high-speed outputs. By operating over the full industrial temperature range (-40degC to +85degC), the Si5040 accommodates demanding module thermal conditions.